18523214. EPITAXIAL SOURCE/DRAIN STRUCTURES FOR MULTIGATE DEVICES AND METHODS OF FABRICATING THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

EPITAXIAL SOURCE/DRAIN STRUCTURES FOR MULTIGATE DEVICES AND METHODS OF FABRICATING THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Chen-Ming Lee of Yangmei City (TW)

I-Wen Wu of Hsinchu City (TW)

Po-Yu Huang of Hsinchu (TW)

Fu-Kai Yang of Hsinchu City (TW)

Mei-Yun Wang of Hsin-Chu (TW)

EPITAXIAL SOURCE/DRAIN STRUCTURES FOR MULTIGATE DEVICES AND METHODS OF FABRICATING THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18523214 titled 'EPITAXIAL SOURCE/DRAIN STRUCTURES FOR MULTIGATE DEVICES AND METHODS OF FABRICATING THEREOF

Simplified Explanation

The abstract of the patent application describes epitaxial source/drain structures for enhancing the performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs. The structures include an inner portion with a higher dopant concentration and an outer portion with a lower dopant concentration, with the inner portion physically contacting the dielectric substrate.

• Epitaxial source/drain structures for multigate devices:

   - Enhance device performance
   - Include inner portion with higher dopant concentration and outer portion with lower dopant concentration
   - Inner portion physically contacts dielectric substrate
   - Outer portion is between inner portion and channel layer

Potential Applications

The technology can be applied in the semiconductor industry for improving the performance of multigate devices, leading to faster and more efficient electronic devices.

Problems Solved

1. Improved performance of multigate devices 2. Enhanced conductivity and carrier mobility in the source/drain regions

Benefits

1. Increased speed and efficiency of electronic devices 2. Better control over dopant concentrations for optimized device performance

Potential Commercial Applications

Optimizing the performance of semiconductor devices in various industries, including consumer electronics, telecommunications, and computing.

Possible Prior Art

One possible prior art could be the use of different dopant concentrations in source/drain structures to improve device performance.

What are the potential manufacturing challenges of implementing epitaxial source/drain structures in multigate devices?

Implementing epitaxial source/drain structures in multigate devices may require precise control over the dopant concentrations in the inner and outer portions of the structure. Additionally, ensuring the physical contact between the inner portion and the dielectric substrate can be a challenge during the fabrication process.

How do epitaxial source/drain structures compare to traditional source/drain structures in terms of device performance and reliability?

Epitaxial source/drain structures offer the potential for enhanced device performance due to the optimized dopant concentrations and improved carrier mobility. However, the reliability of these structures over time and under various operating conditions would need to be thoroughly evaluated and compared to traditional source/drain structures.

Original Abstract Submitted

Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.