18517275. FLEXIBLE MERGE SCHEME FOR SOURCE/DRAIN EPITAXY REGIONS simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

FLEXIBLE MERGE SCHEME FOR SOURCE/DRAIN EPITAXY REGIONS

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Kai-Hsuan Lee of Hsinchu (TW)

Chia-Ta Yu of New Taipei City (TW)

Cheng-Yu Yang of Xihu Township (TW)

Sheng-Chen Wang of Hsinchu (TW)

Sai-Hooi Yeong of Zhubei City (TW)

Feng-Cheng Yang of Zhudong Township (TW)

Yen-Ming Chen of Chu-Pei City (TW)

FLEXIBLE MERGE SCHEME FOR SOURCE/DRAIN EPITAXY REGIONS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18517275 titled 'FLEXIBLE MERGE SCHEME FOR SOURCE/DRAIN EPITAXY REGIONS

Simplified Explanation

The method described in the abstract involves etching semiconductor fins to form recesses and then performing epitaxy to grow semiconductor regions from these recesses. The first epitaxy semiconductor regions are merged with each other, while the second epitaxy semiconductor regions are separated from each other.

• Etching of semiconductor fins to form recesses
• Simultaneous growth of semiconductor regions from the recesses through epitaxy
• Merging of first epitaxy semiconductor regions
• Separation of second epitaxy semiconductor regions

Potential Applications

This technology could be applied in the manufacturing of advanced semiconductor devices, such as transistors and integrated circuits.

Problems Solved

This method allows for precise control over the growth and arrangement of semiconductor regions, enabling the creation of complex semiconductor structures with improved performance.

Benefits

The ability to grow semiconductor regions from recesses in a controlled manner can lead to enhanced device functionality and efficiency.

Potential Commercial Applications

The technology could find commercial applications in the semiconductor industry for the production of high-performance electronic devices.

Possible Prior Art

Prior methods of semiconductor fin etching and epitaxial growth may exist, but the specific technique described in this patent application may offer unique advantages in terms of efficiency and precision.

How does this method compare to traditional semiconductor fabrication processes?

This method offers a more controlled and precise way of growing semiconductor regions, potentially leading to improved device performance and efficiency.

What are the potential scalability limitations of this technology?

The scalability of this method may depend on factors such as the size of the semiconductor fins and the uniformity of epitaxial growth across a large area. Further research and development may be needed to address scalability challenges.

Original Abstract Submitted

A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.