18513028. GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING SELECTIVE BOTTOM-UP APPROACH simplified abstract (Intel Corporation)
Contents
- 1 GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING SELECTIVE BOTTOM-UP APPROACH
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING SELECTIVE BOTTOM-UP APPROACH - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Unanswered Questions
- 1.10 Original Abstract Submitted
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING SELECTIVE BOTTOM-UP APPROACH
Organization Name
Inventor(s)
Nicole Thomas of Portland OR (US)
Ehren Mannebach of Beaverton OR (US)
Cheng-Ying Huang of Portland OR (US)
Marko Radosavljevic of Portland OR (US)
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING SELECTIVE BOTTOM-UP APPROACH - A simplified explanation of the abstract
This abstract first appeared for US patent application 18513028 titled 'GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CHANNEL STRUCTURES USING SELECTIVE BOTTOM-UP APPROACH
Simplified Explanation
The abstract describes gate-all-around integrated circuit structures with depopulated channel structures, fabricated using a selective bottom-up approach. The structure includes a vertical arrangement of nanowires above a substrate, with active nanowires and oxide nanowires. Gate stacks are positioned over and around these nanowires.
- Vertical arrangement of nanowires above a substrate
- Active nanowires and oxide nanowires in the structure
- First gate stack positioned over and around active nanowires
- Second gate stack positioned over and around oxide nanowires
Potential Applications
The technology can be applied in advanced semiconductor devices, nanoelectronics, and integrated circuits.
Problems Solved
This innovation addresses the need for more efficient and compact integrated circuit structures with depopulated channel structures.
Benefits
The gate-all-around integrated circuit structures offer improved performance, reduced power consumption, and enhanced scalability.
Potential Commercial Applications
- Enhancing the performance of semiconductor devices
- Improving the efficiency of nanoelectronics
Unanswered Questions
How does this technology compare to traditional integrated circuit structures?
The article does not provide a direct comparison between this technology and traditional integrated circuit structures.
What are the specific fabrication challenges associated with this approach?
The article does not delve into the specific fabrication challenges that may arise when implementing this selective bottom-up approach.
Original Abstract Submitted
Gate-all-around integrated circuit structures having depopulated channel structures, and methods of fabricating gate-all-around integrated circuit structures having depopulated channel structures using a selective bottom-up approach, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires above a substrate. The vertical arrangement of nanowires has one or more active nanowires above one or more oxide nanowires. A first gate stack is over and around the one or more active nanowires. A second gate stack is over and around the one or more oxide nanowires.
