18506111. PACKAGE STRUCTURE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

PACKAGE STRUCTURE

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Kai-Ming Chiang of Hsinchu (TW)

Chao-wei Li of Hsinchu (TW)

Wei-Lun Tsai of Hsinchu (TW)

Chia-Min Lin of Hsinchu (TW)

Yi-Da Tsai of Chiayi Country (TW)

Sheng-Feng Weng of Taichung City (TW)

Yu-Hao Chen of HsinChu City (TW)

Sheng-Hsiang Chiu of Tainan City (TW)

Chih-Wei Lin of Hsinchu County (TW)

Ching-Hua Hsieh of Hsinchu (TW)

PACKAGE STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18506111 titled 'PACKAGE STRUCTURE

Simplified Explanation

The memory device described in the patent application includes a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation, and a buffer cap.

• The conductive terminals are located on one surface of the base semiconductor die.
• The memory dies are stacked on the opposite surface of the base semiconductor die.
• The insulating encapsulation surrounds the memory dies on the base semiconductor die.
• The buffer cap covers the conductive terminals, sidewalls of the base semiconductor die, and sidewalls of the insulating encapsulation.

• • Potential Applications:**
• Memory devices for electronic devices such as smartphones, tablets, and computers.
• Storage devices for data centers and servers.

• • Problems Solved:**
• Protects the memory dies and base semiconductor die from external elements.
• Provides a compact and efficient memory device design.

• • Benefits:**
• Improved durability and reliability of memory devices.
• Enhanced protection against physical damage and environmental factors.
• Space-saving design for compact electronic devices.

Original Abstract Submitted

A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.