18504027. METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
Organization Name
Taiwan Semiconductor Manufacturing Company, Ltd.
Inventor(s)
Hung-Li Chiang of Taipei City (TW)
Chih-Liang Chen of Hsinchu (TW)
Tzu-Chiang Chen of Hsinchu City (TW)
I-Sheng Chen of Taipei City (TW)
Lei-Chun Chou of Taipei City (TW)
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18504027 titled 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
Simplified Explanation
- Method of manufacturing a semiconductor device involving forming fin structures over a semiconductor substrate - Each fin structure has a first region near the substrate and a second region away from the substrate - Electrically conductive layer formed between first regions of adjacent fin structures - Gate electrode structure formed perpendicular to the fin structures over the second region - Metallization layer with conductive lines formed over the gate electrode structure
Potential Applications
- Semiconductor manufacturing industry - Electronics industry - Integrated circuit design
Problems Solved
- Efficient manufacturing of semiconductor devices - Improved performance of electronic devices - Enhanced integration of components in circuits
Benefits
- Higher efficiency in semiconductor device production - Increased performance and functionality of electronic devices - Enhanced integration capabilities for complex circuits
Original Abstract Submitted
A method of manufacturing a semiconductor device includes forming a plurality of fin structures extending in a first direction over a semiconductor substrate. Each fin structure includes a first region proximate to the semiconductor substrate and a second region distal to the semiconductor substrate. An electrically conductive layer is formed between the first regions of a first adjacent pair of fin structures. A gate electrode structure is formed extending in a second direction substantially perpendicular to the first direction over the fin structure second region, and a metallization layer including at least one conductive line is formed over the gate electrode structure.