18502086. METHOD OF FABRICATING MEMORY DEVICE AND PACKAGE STRUCTURE simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

METHOD OF FABRICATING MEMORY DEVICE AND PACKAGE STRUCTURE

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Kai-Ming Chiang of Hsinchu (TW)

Chao-wei Li of Hsinchu (TW)

Wei-Lun Tsai of Hsinchu (TW)

Chia-Min Lin of Hsinchu (TW)

Yi-Da Tsai of Chiayi Country (TW)

Sheng-Feng Weng of Taichung City (TW)

Yu-Hao Chen of HsinChu City (TW)

Sheng-Hsiang Chiu of Tainan City (TW)

Chih-Wei Lin of Hsinchu County (TW)

Ching-Hua Hsieh of Hsinchu (TW)

METHOD OF FABRICATING MEMORY DEVICE AND PACKAGE STRUCTURE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18502086 titled 'METHOD OF FABRICATING MEMORY DEVICE AND PACKAGE STRUCTURE

Simplified Explanation

The abstract describes a memory device with a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation, and a buffer cap.

• Conductive terminals are on one surface of the base semiconductor die.
• Memory dies are stacked over the opposite surface of the base semiconductor die.
• Insulating encapsulation surrounds the memory dies on the base semiconductor die.
• Buffer cap covers the base semiconductor die and insulating encapsulation.

• • Potential Applications:**

• Data storage devices
• Embedded memory in electronic devices
• High-density memory modules

• • Problems Solved:**

• Efficient stacking of memory dies
• Protection of memory components
• Improved thermal management

• • Benefits:**

• Increased memory capacity
• Enhanced reliability
• Compact design for space-saving applications

Original Abstract Submitted

A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.