18496372. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Junghoon Kang of Anyang-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18496372 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the patent application includes a first semiconductor chip, an encapsulant covering at least a portion of the chip, insulating layers on the encapsulant, and wiring layers partially covered by the insulating layers. The outermost insulating layer has a first region and a second region with different colors, and at least one marking pattern with a step portion is provided in the first region.

  • The semiconductor package includes a first semiconductor chip.
  • The package has an encapsulant covering at least a portion of the first semiconductor chip.
  • Insulating layers are provided on the encapsulant, and each insulating layer is transparent or translucent.
  • Wiring layers are provided on the encapsulant, partially covered by the insulating layers.
  • The outermost insulating layer has a first region and a second region with different colors.
  • At least one marking pattern with at least one step portion is provided in the first region of the outermost insulating layer.

Potential applications of this technology:

  • Semiconductor packaging industry
  • Electronics manufacturing

Problems solved by this technology:

  • Improved visibility and identification of different regions on the semiconductor package
  • Enhanced aesthetic appeal of the package

Benefits of this technology:

  • Clear differentiation between regions on the package
  • Easier identification of specific components
  • Enhanced overall design of the semiconductor package


Original Abstract Submitted

A semiconductor package includes a first semiconductor chip; an encapsulant covering at least a portion of the first semiconductor chip; insulating layers provided on the encapsulant, each of the insulating layers being transparent or translucent; and wiring layers provided on the encapsulant, the wiring layers being partially covered by the insulating layers, wherein an outermost insulating layer of the insulating layers comprises a first region and a second region, a color of the first region is different from a color of the second region, the second region surrounds the first region, and at least one marking pattern comprising at least one step portion is provided in the first region of the outermost insulating layer.