18492238. METHOD OF USING SEMICONDUCTOR DEVICE AND METHOD OF MAKING simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
Contents
METHOD OF USING SEMICONDUCTOR DEVICE AND METHOD OF MAKING
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Ming Jian Wang of Hsinchu (TW)
Jia Liang Zhong of Hsinchu (TW)
METHOD OF USING SEMICONDUCTOR DEVICE AND METHOD OF MAKING - A simplified explanation of the abstract
This abstract first appeared for US patent application 18492238 titled 'METHOD OF USING SEMICONDUCTOR DEVICE AND METHOD OF MAKING
Simplified Explanation
The method described in the patent application involves biasing a substrate by connecting a silicide structure to a bias voltage supply, conducting the bias voltage to a silicide extension between adjacent gate structures, and transferring the bias voltage into a doped region of the substrate.
- Silicide structure electrically connected to bias voltage supply
- Bias voltage conducted to silicide extension between gate structures
- Bias voltage transferred to doped region of substrate below gate structures
- Potential Applications:**
- Semiconductor manufacturing
- Integrated circuit design
- Electronics industry
- Problems Solved:**
- Efficient biasing of substrate
- Improved performance of electronic devices
- Enhanced conductivity in semiconductor structures
- Benefits:**
- Increased efficiency in substrate biasing
- Enhanced performance of electronic components
- Improved conductivity in semiconductor devices
Original Abstract Submitted
A method of biasing a substrate includes electrically connecting a silicide structure to a bias voltage supply. The method further includes conducting a bias voltage received by the silicide structure to a silicide extension extending from a main body of the silicide structure, wherein the silicide extension extends between adjacent gate structures of a plurality of first gate structures. The method further includes transferring the bias voltage from the silicide extension into a doped region of a substrate below the adjacent gate structures of the plurality of first gate structures.
