18491966. NON-VOLATILE MEMORY DEVICE AND PROGRAMMING METHOD THEREOF simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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NON-VOLATILE MEMORY DEVICE AND PROGRAMMING METHOD THEREOF

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Ji-Sang Lee of Iksan-si (KR)

NON-VOLATILE MEMORY DEVICE AND PROGRAMMING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18491966 titled 'NON-VOLATILE MEMORY DEVICE AND PROGRAMMING METHOD THEREOF

Simplified Explanation

The abstract of this patent application describes a non-volatile memory device that includes a memory cell array, a row decoder, a page buffer, and a control circuit. The memory cell array consists of multiple memory cells connected to word lines and bit lines. The row decoder selectively controls the word lines, while the page buffer consists of latches corresponding to the bit lines. The control circuit is responsible for controlling the device to enter a suspend state after completing a verify operation of a program loop in response to a suspend request during the execution operation of the program loop.

  • The patent application describes a non-volatile memory device with specific components and their functions.
  • The memory cell array is connected to word lines and bit lines, allowing for data storage.
  • The row decoder selectively controls the word lines, enabling the selection of specific memory cells.
  • The page buffer consists of latches corresponding to the bit lines, facilitating data transfer.
  • The control circuit manages the device's operation and can put it into a suspend state after completing a specific operation.

Potential applications of this technology:

  • Non-volatile memory devices are commonly used in various electronic devices, such as smartphones, tablets, and computers.
  • The described memory device can be utilized in any application that requires data storage and retrieval.

Problems solved by this technology:

  • Non-volatile memory devices need efficient control mechanisms to ensure proper operation and data integrity.
  • The control circuit in this patent application addresses the need for a mechanism to enter a suspend state after completing specific operations, improving overall device performance and power management.

Benefits of this technology:

  • The memory device described in the patent application offers improved control and management features.
  • The ability to enter a suspend state after completing operations can enhance power efficiency and extend battery life in devices that use this memory technology.
  • The selective control of word lines and the use of latches in the page buffer can improve data access speed and overall device performance.


Original Abstract Submitted

A non-volatile memory device includes: a memory cell array including a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a row decoder configured to selectively control the plurality of word lines, a page buffer including a plurality of latches corresponding to the plurality of bit lines, respectively, and a control circuit configured to control the non-volatile memory device to enter a suspend state after terminating a verify operation of a program loop of a program operation of the plurality of memory cells in response to a suspend request being generated during an execution operation of the program loop.