18488561. Selectable Monolithic or External Scalable Die-to-Die Interconnection System Methodology simplified abstract (Apple Inc.)

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Selectable Monolithic or External Scalable Die-to-Die Interconnection System Methodology

Organization Name

Apple Inc.

Inventor(s)

Sanjay Dabral of Cupertino CA (US)

Jun Zhai of Cupertino CA (US)

Jung-Cheng Yeh of Sunnyvale CA (US)

Kunzhong Hu of Cupertino CA (US)

Raymundo Camenforte of San Jose CA (US)

Thomas Hoffmann of Los Gatos CA (US)

Selectable Monolithic or External Scalable Die-to-Die Interconnection System Methodology - A simplified explanation of the abstract

This abstract first appeared for US patent application 18488561 titled 'Selectable Monolithic or External Scalable Die-to-Die Interconnection System Methodology

Simplified Explanation

The patent application describes multi-die structures and methods of fabrication. It specifically focuses on a structure that includes two dies connected by die-to-die routing. This interconnection can be achieved either as a chip-level die-to-die routing or as an external package-level die-to-die routing.

  • The patent application describes a multi-die structure with die-to-die routing.
  • The die-to-die routing can be integrated at the chip-level or the package-level.
  • The structure includes a first die and a second die connected by the die-to-die routing.

Potential Applications:

  • This technology can be applied in the field of semiconductor manufacturing.
  • It can be used in the fabrication of multi-chip modules or integrated circuits.
  • The structure enables efficient interconnection between multiple dies, allowing for improved performance and functionality in electronic devices.

Problems Solved:

  • Traditional methods of interconnecting multiple dies can be complex and inefficient.
  • This technology solves the problem of achieving efficient die-to-die routing in multi-die structures.
  • It provides a simplified and effective solution for interconnecting multiple dies in electronic devices.

Benefits:

  • The multi-die structure with die-to-die routing allows for improved performance and functionality in electronic devices.
  • It enables efficient communication and data transfer between multiple dies.
  • The technology offers a simplified and cost-effective method for fabricating multi-die structures.


Original Abstract Submitted

Multi-die structures and methods of fabrication are described. In an embodiment, a multi-die structure includes a first die, a second die, and die-to-die routing connecting the first die to the second die. The die-to-die interconnection may be monolithically integrated as a chip-level die-to-die routing, or external package-level die-to-die routing.