18483211. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
- 1 SEMICONDUCTOR PACKAGE
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Hyun Soo Chung of Suwon-si (KR)
Young Lyong Kim of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18483211 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application includes a circuit board, an interposer structure, a mold layer, and two semiconductor chips connected to the interposer structure. The mold layer wraps around the semiconductor chips and includes a penetrating portion in a plurality of trenches on the interposer structure.
- Interposer structure with trenches: The interposer structure has a center region where the first and second semiconductor chips are placed, as well as an edge region with a plurality of trenches extending through the interposer structure.
- Mold layer with penetrating portion: The mold layer is located in the trenches of the interposer structure and wraps around the semiconductor chips. It includes a penetrating portion that aligns with the bottom surface of the interposer structure.
Potential Applications
The technology described in this patent application could be applied in the manufacturing of advanced semiconductor packages for various electronic devices, such as smartphones, tablets, and computers.
Problems Solved
This technology solves the problem of efficiently packaging and protecting multiple semiconductor chips in a compact and reliable manner, ensuring proper electrical connections and thermal management.
Benefits
The benefits of this technology include improved performance and reliability of electronic devices, reduced size and weight of semiconductor packages, and enhanced thermal dissipation for better overall functionality.
Potential Commercial Applications
The potential commercial applications of this technology could be in the semiconductor industry for the production of high-performance electronic devices, as well as in other industries requiring advanced packaging solutions for integrated circuits.
Possible Prior Art
One possible prior art for this technology could be the use of mold layers in semiconductor packaging to protect and encapsulate semiconductor chips. However, the specific configuration of the mold layer with a penetrating portion in the trenches of the interposer structure may be a novel aspect of this innovation.
Unanswered Questions
How does this technology compare to existing semiconductor packaging methods in terms of cost-effectiveness and performance?
This article does not provide a direct comparison between this technology and existing semiconductor packaging methods. Further research and analysis would be needed to determine the cost-effectiveness and performance advantages of this innovation.
What are the potential challenges or limitations of implementing this technology in mass production?
The article does not address the potential challenges or limitations of implementing this technology in mass production. Factors such as scalability, manufacturing complexity, and compatibility with existing production processes could be important considerations that need to be explored further.
Original Abstract Submitted
A semiconductor package may include a circuit board, an interposer structure on the circuit board, a mold layer, and a first semiconductor chip and a second semiconductor chip spaced apart from each other in a first direction on a center region of the interposer structure and electrically connected to the interposer structure. The interposer structure may include a plurality of trenches in an edge region of the interposer structure and extending through the interposer structure. The mold layer may be in the plurality of trenches and may wrap the first and second semiconductor chips. The mold layer may include a penetrating portion in the plurality of trenches and a stack portion on the interposer structure. A bottom surface of the penetrating portion of the mold layer may be on a same plane as a bottom surface of the interposer structure.
