18475546. SEMICONDUCTOR PACKAGES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

From WikiPatents
Jump to navigation Jump to search

SEMICONDUCTOR PACKAGES

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Chulyong Jang of Anyang-si (KR)

SEMICONDUCTOR PACKAGES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18475546 titled 'SEMICONDUCTOR PACKAGES

Simplified Explanation

The abstract describes a method of manufacturing a semiconductor package. Here is a simplified explanation of the patent application:

  • The method starts by creating through-vias that extend from the front side of a semiconductor substrate into the substrate.
  • A circuit structure, including a wiring structure, is formed on the front side of the semiconductor substrate and is electrically connected to the through-vias.
  • A portion of the semiconductor substrate is removed so that at least a portion of each through-via protrudes to the rear side of the substrate.
  • A passivation layer is formed to cover the protruding portion of each through-via.
  • Trenches are formed along the periphery of each through-via.
  • A portion of the passivation layer is removed to expose one end of each through-via on the upper surface of the passivation layer.
  • Backside pads, including a dam structure, are formed in each trench, with the dam structure spaced apart from the corresponding through-via.

Potential applications of this technology:

  • Semiconductor packaging for integrated circuits
  • Microelectronics manufacturing
  • Electronic devices requiring compact and efficient wiring structures

Problems solved by this technology:

  • Provides a method for forming through-vias and wiring structures in a semiconductor package
  • Enables efficient electrical connections between the front and rear sides of the semiconductor substrate
  • Facilitates the formation of backside pads for improved connectivity

Benefits of this technology:

  • Improved electrical performance and reliability of semiconductor packages
  • Enhanced miniaturization and integration of electronic devices
  • Simplified manufacturing process for semiconductor packages


Original Abstract Submitted

A method of manufacturing a semiconductor package includes: forming through-vias extending from a front side of a semiconductor substrate into the substrate; forming, on the front side of the semiconductor substrate, a circuit structure including a wiring structure electrically connected to the through-vias; removing a portion of the semiconductor substrate so that at least a portion of each of the through-vias protrudes to a rear side of the semiconductor substrate; forming a passivation layer covering the protruding portion of each of the through-vias; forming trenches recessed along a periphery of a corresponding one of the through-vias; removing a portion of the passivation layer so that one end of each of the through-vias is exposed to the upper surface of the passivation layer; and forming backside pads including a dam structure in each of the trenches, the dam structure being spaced apart from the corresponding one of the through-vias.