18464839. SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME simplified abstract (Taiwan Semiconductor Manufacturing Company, Ltd.)

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SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Ka-Hing Fung of Zhudong Township (TW)

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18464839 titled 'SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

Simplified Explanation

The patent application describes a semiconductor structure that includes multiple vertically stacked and separated nanostructures, an adjacent source/drain feature, and an inner spacer layer. The inner spacer layer has a vertical portion between the nanostructures and the source/drain feature, as well as horizontal portions between the nanostructures. A source/drain junction is located in the vertical portion of the inner spacer layer, spaced apart from the nanostructures.

  • The semiconductor structure includes vertically stacked and separated nanostructures.
  • An inner spacer layer is present, with a vertical portion between the nanostructures and a source/drain feature.
  • The inner spacer layer also has horizontal portions between the nanostructures.
  • A source/drain junction is located in the vertical portion of the inner spacer layer, spaced apart from the nanostructures.

Potential Applications

  • This semiconductor structure can be used in various electronic devices such as transistors, integrated circuits, and memory devices.
  • It can be applied in the development of high-performance and energy-efficient electronic devices.

Problems Solved

  • The structure addresses the challenge of reducing the size of electronic components while maintaining their functionality and performance.
  • It solves the problem of minimizing interference between the nanostructures and the source/drain feature.

Benefits

  • The vertically stacked and separated nanostructures allow for increased device density and improved performance.
  • The inner spacer layer provides better control over the source/drain junction and reduces interference.
  • The semiconductor structure enables the development of smaller, more efficient, and higher-performing electronic devices.


Original Abstract Submitted

A semiconductor structure is provided. The semiconductor structure includes a plurality of nanostructures vertically stacked and separated from one another, a source/drain feature adjacent to the plurality of nanostructures, and an inner spacer layer. The inner spacer layer includes a vertical portion interposing between the plurality of nanostructures and the source/drain feature and a plurality of horizontal portions interposing between the nanostructures. A source/drain junction is located in the vertical portion of the inner spacer layer and is spaced apart from the plurality of nanostructures by a distance.

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