18464093. NON-VOLATILE MEMORY DEVICE AND CORRESPONDING METHOD OF OPERATION simplified abstract (STMICROELECTRONICS S.R.L.)

NON-VOLATILE MEMORY DEVICE AND CORRESPONDING METHOD OF OPERATION

Organization Name

STMICROELECTRONICS S.R.L.

Inventor(s)

Antonino Conte of Tremestieri Etneo (IT)

Agatino Massimo Maccarrone of Regalbuto (IT)

Francesco Tomaiuolo of Acireale (IT)

Thomas Jouanneau of Saint-Égrève (FR)

Vincenzo Russo of S. Maria di Licodia (IT)

NON-VOLATILE MEMORY DEVICE AND CORRESPONDING METHOD OF OPERATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18464093 titled 'NON-VOLATILE MEMORY DEVICE AND CORRESPONDING METHOD OF OPERATION

Simplified Explanation

The abstract describes a patent application for a non-volatile memory device with a memory sector consisting of tiles containing memory cells arranged in word lines and bit lines. The device includes pre-decoder, central row decoder, and buffer circuits for driving word lines based on received signals.

• Memory sector with tiles arranged horizontally
• Tiles contain memory cells in word lines and bit lines
• Pre-decoder produces pre-decoding signals from encoded address signals
• Central row decoder generates driving signals for word lines
• Buffer circuits on each tile drive word lines based on received signals

Potential Applications

The technology described in this patent application could be applied in various non-volatile memory devices such as solid-state drives, flash memory, and memory cards.

Problems Solved

This technology solves the problem of efficiently driving word lines in a memory sector with multiple tiles, improving the overall performance and reliability of the non-volatile memory device.

Benefits

The benefits of this technology include enhanced memory access speed, reduced power consumption, increased data storage capacity, and improved data retention in non-volatile memory devices.

Potential Commercial Applications

• "Innovative Memory Sector Design for Enhanced Performance in Non-Volatile Memory Devices"

Possible Prior Art

One possible prior art for this technology could be the use of similar pre-decoding and driving mechanisms in other types of memory devices, such as dynamic random-access memory (DRAM) or static random-access memory (SRAM).

How does this technology compare to existing memory sector designs in terms of performance and efficiency?

This article does not provide a direct comparison with existing memory sector designs to evaluate the performance and efficiency improvements offered by the described technology.

What are the potential limitations or challenges in implementing this technology in practical non-volatile memory devices?

The article does not address any potential limitations or challenges that may arise during the implementation of this technology in real-world non-volatile memory devices.

Original Abstract Submitted

In a non-volatile memory device, a memory sector is provided. The memory sector includes a plurality of tiles arranged horizontally. Each tile includes a plurality of memory cells arranged in horizontal word lines and vertical bit lines. A pre-decoder is configured to receive a set of encoded address signals to produce pre-decoding signals. A central row decoder is arranged in line with the plurality of tiles, receives the pre-decoding signals and produces level-shifted pull-up and pull-down driving signals for driving the word lines. First buffer circuits are arranged on a first side of each tile. Each of the first buffer circuits is coupled to a respective word line, receives a level-shifted pull-up driving signal and a level-shifted pull-down driving signal, and selectively pulls up or pulls down the respective word line as a function of the values of the received signals.