18461569. SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
- 1 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Seungkwan Ryu of Suwon-si (KR)
Yanggyoo Jung of Suwon-si (KR)
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18461569 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application includes a package substrate, an interposer mounted on the package substrate via first conductive bumps, first and second semiconductor devices mounted on the interposer via second conductive bumps, and an underfill member filling the space between the first conductive bumps. The interposer has a central region and a peripheral region, with different types of conductive bumps in each region.
- The semiconductor package includes a package substrate, an interposer, and first and second semiconductor devices.
- The interposer has a central region and a peripheral region, with different types of conductive bumps in each region.
- The first conductive bumps in the central region have a circular shape, while those in the peripheral region have an elliptical shape.
Potential Applications
The technology described in this patent application could be applied in the manufacturing of advanced semiconductor packages for various electronic devices, such as smartphones, tablets, and computers.
Problems Solved
This technology solves the problem of efficiently connecting multiple semiconductor devices in a compact package while ensuring reliable electrical connections between them.
Benefits
The benefits of this technology include improved performance, increased reliability, and reduced size of semiconductor packages, leading to enhanced functionality and durability of electronic devices.
Potential Commercial Applications
The potential commercial applications of this technology could be in the semiconductor industry for the production of high-performance electronic devices with compact and reliable packaging.
Possible Prior Art
One possible prior art for this technology could be the use of different types of conductive bumps in semiconductor packaging to optimize electrical connections and space utilization.
Original Abstract Submitted
A semiconductor package includes a package substrate, an interposer mounted on the package substrate via first conductive bumps, first and second semiconductor devices disposed spaced apart from each other on the interposer and mounted on the interposer via second conductive bumps, and an underfill member filling a space between the first conductive bumps that are between the package substrate and the interposer. The interposer includes a central region and a peripheral region at least partially surrounding the central region. The first conductive bumps include first bump structures disposed on second bonding pads, which are in the central region and on a lower surface of the interposer, respectively, and having a circular shape. The first conductive bumps further include second bump structures disposed on second bonding pads, which are in the peripheral region and on the lower surface of the interposer, respectively, and having an elliptical shape.
