18459821. SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Hyungsun Jang of Suwon-si (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18459821 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the abstract includes a semiconductor chip with chip pads, a redistribution wiring layer on the first surface of the chip, and conductive bumps on the redistribution wiring layer. The redistribution wiring layer consists of an insulating layer, redistribution wirings, a protective layer, and UBM pads.

  • The semiconductor package includes a semiconductor chip with chip pads on its first surface.
  • A redistribution wiring layer is formed on the first surface, consisting of an insulating layer, redistribution wirings, a protective layer, and UBM pads.
  • The redistribution wirings are electrically connected to the chip pads.
  • The protective layer has an opening exposing at least a portion of a first redistribution wiring, with a UBM pad provided on the exposed portion.
  • Conductive bumps are placed on the UBM pads of the redistribution wiring layer.

Potential Applications

This technology can be applied in:

  • Semiconductor manufacturing
  • Electronic devices
  • Integrated circuits

Problems Solved

This technology helps in:

  • Improving electrical connections in semiconductor packages
  • Enhancing the performance of electronic devices
  • Ensuring reliable signal transmission

Benefits

The benefits of this technology include:

  • Increased efficiency in semiconductor packaging
  • Enhanced durability of electronic components
  • Improved overall performance of integrated circuits

Potential Commercial Applications

The potential commercial applications of this technology can be seen in:

  • Consumer electronics
  • Telecommunications industry
  • Automotive sector

Possible Prior Art

One possible prior art for this technology could be the use of UBM pads in semiconductor packaging to improve electrical connections and signal transmission.

Unanswered Questions

How does this technology impact the cost of semiconductor packaging?

This article does not provide information on the cost implications of implementing this technology in semiconductor packaging.

What are the environmental considerations of using this technology in electronic devices?

The environmental impact of using this technology in electronic devices is not addressed in the article.


Original Abstract Submitted

A semiconductor package includes: a semiconductor chip having chip pads disposed on a first surface thereof; a redistribution wiring layer formed on the first surface, wherein the redistribution wiring layer includes an insulating layer, redistribution wirings, a protective layer, and an under bump metallurgy (UBM) pad of UBM pads, wherein the insulating layer is formed on the first surface, wherein the redistribution wirings are provided on the insulating layer and are electrically connected to the chip pads, wherein the protective layer is provided on the insulating layer and has an opening that exposes at least a portion of a first redistribution wiring of the redistribution wirings, and wherein the under bump metallurgy (UBM) pad is provided on the at least a portion of the first redistribution wiring that is exposed by the opening; and conductive bumps disposed on the UBM pads of the redistribution wiring layer.