18455854. SEMICONDUCTOR PACKAGES simplified abstract (Samsung Electronics Co., Ltd.)

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SEMICONDUCTOR PACKAGES

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

Eunseok Song of Suwon-si (KR)

SEMICONDUCTOR PACKAGES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18455854 titled 'SEMICONDUCTOR PACKAGES

Simplified Explanation

The semiconductor package described in the patent application includes a substrate with a cavity, a bridge chip structure in the cavity consisting of a first bridge chip and a second bridge chip stacked on top of each other, and multiple semiconductor chips placed laterally on the substrate. Each semiconductor chip has a first region electrically connected to the first bridge chip and a second region electrically connected to the second bridge chip.

  • The semiconductor package includes a bridge chip structure with two stacked chips for improved performance.
  • Multiple semiconductor chips are spaced apart laterally on the substrate for efficient use of space.
  • Each semiconductor chip has regions connected to different bridge chips for optimized electrical connections.
      1. Potential Applications
  • This technology can be used in various electronic devices such as smartphones, tablets, and computers.
  • It can also be applied in automotive electronics, industrial equipment, and communication devices.
      1. Problems Solved
  • Provides a compact and efficient way to connect multiple semiconductor chips in a package.
  • Optimizes electrical connections between semiconductor chips and bridge chips for improved performance.
      1. Benefits
  • Improved performance and efficiency in electronic devices.
  • Space-saving design for compact devices.
  • Enhanced electrical connections for better functionality.


Original Abstract Submitted

A semiconductor package includes a substrate having a cavity, a bridge chip structure in the cavity of the substrate and including a first bridge chip and a second bridge chip stacked on the first bridge chip, and a plurality of semiconductor chips spaced apart laterally on the substrate. Each of the plurality of semiconductor chips includes a first region that is electrically connected to the first bridge chip and a second region that is electrically connected to the second bridge chip.