18452020. WEAR LEVELING IN SOLID STATE DRIVES simplified abstract (Micron Technology, Inc.)

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WEAR LEVELING IN SOLID STATE DRIVES

Organization Name

Micron Technology, Inc.

Inventor(s)

Zoltan Szubbocsev of Haimhausen (DE)

WEAR LEVELING IN SOLID STATE DRIVES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18452020 titled 'WEAR LEVELING IN SOLID STATE DRIVES

Simplified Explanation

The patent application describes a computer storage device that includes a host interface, a controller, non-volatile storage media with different types of memory units, and firmware. The firmware guides the controller to perform two main tasks:

  • Generate an address map that links logical addresses to physical addresses of the memory units with different types.
  • Adjust the address map based on the program erase budgets to distribute wear evenly across the memory units of different types.

Potential applications of this technology include:

  • Solid-state drives (SSDs) used in computers, laptops, and servers.
  • Flash memory devices used in smartphones, tablets, and other portable devices.
  • Embedded storage systems in automotive, aerospace, and industrial applications.

The problems solved by this technology are:

  • Uneven wear and degradation of memory units with different types, which can lead to premature failure and reduced lifespan of the storage device.
  • Inefficient utilization of the storage media due to uneven wear, resulting in reduced overall storage capacity and performance.

The benefits of this technology are:

  • Extended lifespan and improved reliability of the storage device by evenly distributing wear across memory units.
  • Optimal utilization of the storage media, maximizing storage capacity and performance.
  • Enhanced user experience with faster access times and improved data integrity.


Original Abstract Submitted

A computer storage device having: a host interface; a controller; non-volatile storage media having memory units of different types and having different program erase budgets; and firmware. The firmware instructs the controller to: generate an address map mapping logical addresses to physical addresses of the memory units the different types; and adjust the address map based at least in part on the program erase budgets to level wear across the memory units of the different types.

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