18450969. SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC SYSTEMS INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC SYSTEMS INCLUDING THE SAME
Organization Name
Inventor(s)
Beyong Hyun Koh of Suwon-si (KR)
Hyun Gun Jang of Suwon-si (KR)
SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC SYSTEMS INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18450969 titled 'SEMICONDUCTOR MEMORY DEVICES AND ELECTRONIC SYSTEMS INCLUDING THE SAME
Simplified Explanation
The semiconductor memory device described in the patent application includes a unique structure with multiple layers and channel structures. Here are some key points to explain the innovation:
- The device includes a substrate, a mold structure, and channel structures within the mold structure.
- There are source and source sacrificial layers between the substrate and the mold structure, with a source support layer on top.
- The source support layer has three portions, with different vertical distances from the upper surface of the source layer and the substrate.
Potential Applications: This technology could be applied in various semiconductor memory devices, such as flash memory, DRAM, and SRAM.
Problems Solved: This innovation helps improve the performance and efficiency of semiconductor memory devices by optimizing the structure and layering.
Benefits: The benefits of this technology include increased memory capacity, faster data transfer speeds, and enhanced overall performance of semiconductor memory devices.
Potential Commercial Applications of this Technology: One potential commercial application of this technology could be in the development of high-speed and high-capacity memory modules for computers, smartphones, and other electronic devices.
Possible Prior Art: One possible prior art for this technology could be the use of sacrificial layers in semiconductor device fabrication processes to create complex structures with improved performance.
Unanswered Questions: 1. How does the vertical distance between the source support layer and the source layer impact the overall performance of the semiconductor memory device? 2. Are there any specific manufacturing processes or materials required to implement this innovative structure in semiconductor memory devices?
Original Abstract Submitted
A semiconductor memory device comprises a substrate; a mold structure on the substrate; a plurality of channel structures extending in the mold structure; a source layer and a source sacrificial layer between the substrate and the mold structure, wherein the source sacrificial layer is spaced apart from the source layer; and a source support layer on the source layer and the source sacrificial layer, wherein the source support layer is between the source layer and the source sacrificial layer, wherein an upper surface of the source support layer includes first and second portions extending parallel to the substrate, and a third portion that connects the first and second portions, wherein a vertical distance from an upper surface of the source layer to the first portion is smaller than a vertical distance from an upper surface of the substrate to the second portion.
