18448027. MULTI-BIT FLIP FLOP simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)

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MULTI-BIT FLIP FLOP

Organization Name

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor(s)

Chi-Lin Liu of Taipei City (TW)

Shang-Chih Hsieh of Yangmei City (TW)

Wei-Hsiang Ma of Taipei City (TW)

MULTI-BIT FLIP FLOP - A simplified explanation of the abstract

This abstract first appeared for US patent application 18448027 titled 'MULTI-BIT FLIP FLOP

Simplified Explanation

The abstract describes a circuit comprising a multi-bit flip flop, an integrated clock gating circuit, and a control circuit. The control circuit compares output data of the flip flop with input data and generates an enable signal based on the comparison. The enable signal is provided to the clock gating circuit, which then provides a clock signal to the flip flop, causing it to toggle.

  • The circuit includes a multi-bit flip flop, an integrated clock gating circuit, and a control circuit.
  • The control circuit compares output data of the flip flop with input data and generates an enable signal based on the comparison.
  • The enable signal is provided to the clock gating circuit, which then provides a clock signal to the flip flop, causing it to toggle.

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      1. Potential Applications
  • This technology can be used in digital circuits, processors, and other electronic devices requiring efficient clock gating mechanisms.
      1. Problems Solved
  • Helps in reducing power consumption by gating the clock signal based on the comparison of input and output data.
  • Improves overall performance and efficiency of the circuit by controlling clock signals effectively.
      1. Benefits
  • Lower power consumption leading to energy efficiency.
  • Enhanced performance and reliability of electronic devices.
  • Simplified clock gating mechanism for multi-bit flip flops.


Original Abstract Submitted

A circuit includes a multi-bit flip flop, an integrated clock gating circuit connected to the multi-bit flip flop, and a control circuit connected to the integrated clock gating circuit and the multi-bit flip flop. The control circuit compares output data of the multi-bit flip flop corresponding to input data with the input data. The control circuit generates an enable signal based on comparing the output data of the multi-bit flip flop corresponding to the input data with the input data of the multi-bit flip flop. The control circuit provides the enable signal to the integrated clock gating circuit, wherein the integrated clock gating circuit provides, based on the enable signal, a clock signal to the multi-bit flip flop causing the multi-bit flip flop to toggle.

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