18447614. METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

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METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Jerry Chang Jui Kao of Hsinchu (TW)

Meng-Kai Hsu of Hsinchu (TW)

Chin-Shen Lin of Hsinchu (TW)

Ming-Tao Yu of Hsinchu (TW)

Tzu-Ying Lin of Hsinchu (TW)

Chung-Hsing Wang of Hsinchu (TW)

METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18447614 titled 'METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE

Simplified Explanation

The patent application describes a method for forming a circuit region on a substrate, with active and gate regions. It also involves forming input/output patterns in different metal layers to connect the circuit region to external circuitry. The input/output patterns extend in oblique directions to the active and gate regions.

  • The method involves forming a circuit region on a substrate.
  • The circuit region includes active and gate regions.
  • Input/output patterns are formed in different metal layers.
  • The input/output patterns connect the circuit region to external circuitry.
  • The first input/output pattern extends obliquely in a third direction.
  • The second input/output pattern extends obliquely in a fourth direction.
  • The fourth direction is transverse to the third direction.

Potential applications of this technology:

  • Integrated circuits
  • Semiconductor devices
  • Electronic components

Problems solved by this technology:

  • Simplifies the formation of circuit regions on a substrate
  • Provides efficient electrical coupling to external circuitry

Benefits of this technology:

  • Improved circuit integration
  • Enhanced performance of semiconductor devices
  • Simplified manufacturing process


Original Abstract Submitted

A method includes forming a circuit region over a substrate. The circuit region includes at least one active region extending along a first direction, and at least one gate region extending across the at least one active region and along a second direction transverse to the first direction. At least one first input/output (TO) pattern and at least one second TO pattern are correspondingly formed in different first and second metal layers to electrically couple the circuit region to external circuitry outside the circuit region. The at least one first TO pattern extends along a third direction oblique to both the first direction and the second direction. The at least one second TO pattern extends along a fourth direction oblique to both the first direction and the second direction, the fourth direction transverse to the third direction.