18396437. CONSTANT DIVISION AND MODULO VIA CARRYSAVE MODULO REDUCTION simplified abstract (Intel Corporation)

CONSTANT DIVISION AND MODULO VIA CARRYSAVE MODULO REDUCTION

Organization Name

Intel Corporation

Inventor(s)

Theo Drane of El Dorado Hills CA (US)

Christopher Louis Poole of Folsom CA (US)

William Zorn of Folsom CA (US)

Emiliano Morini of El Dorado Hills CA (US)

CONSTANT DIVISION AND MODULO VIA CARRYSAVE MODULO REDUCTION - A simplified explanation of the abstract

This abstract first appeared for US patent application 18396437 titled 'CONSTANT DIVISION AND MODULO VIA CARRYSAVE MODULO REDUCTION

Simplified Explanation

The techniques described in the detailed description above enable the manufacturing of circuits with increased performance and efficiency when performing division by a constant number. One embodiment provides circuitry including an input circuit to receive an input value including a plurality of bits, a logarithmic tree coupled with the input circuit, the logarithmic tree configured to compute an array of values based on a plurality of multi-bit groups of the plurality of bits of the input value, each value in the array of values includes a modulus of a corresponding multi-bit group with respect to the constant, a binary array adder to compute a quotient of the division operation based on the array of values, the input value, and the constant, and an output circuit to output the quotient.

• Input circuit receives input value with multiple bits
• Logarithmic tree computes array of values based on multi-bit groups of input value
• Array of values includes modulus of corresponding multi-bit group with respect to constant
• Binary array adder computes quotient based on array of values, input value, and constant
• Output circuit outputs the quotient

Potential Applications

This technology could be applied in various fields such as:

• High-performance computing
• Cryptography
• Signal processing

Problems Solved

This technology solves the following problems:

• Increased performance and efficiency in division operations
• Simplified circuit design for division by a constant number

Benefits

The benefits of this technology include:

• Improved speed and efficiency in division calculations
• Reduced complexity in circuit design
• Enhanced overall performance of electronic devices

Potential Commercial Applications

The potential commercial applications of this technology include:

• Semiconductor industry
• Electronics manufacturing
• Telecommunications sector

Possible Prior Art

There may be prior art related to circuit designs for division operations, but specific information on prior art related to this exact technology is not available at this time.

How does this technology compare to existing circuit designs for division operations?

This article does not provide a direct comparison with existing circuit designs for division operations.

What are the specific limitations of this technology in terms of scalability and complexity?

The article does not address the specific limitations of this technology in terms of scalability and complexity.

Original Abstract Submitted

The techniques described in the detailed description above enable the manufacturing of circuits with increased performance and efficiency when performing division by a constant number. One embodiment provides circuitry including an input circuit to receive an input value including a plurality of bits, a logarithmic tree coupled with the input circuit, the logarithmic tree configured to compute an array of values based on a plurality of multi-bit groups of the plurality of bits of the input value, each value in the array of values includes a modulus of a corresponding multi-bit group with respect to the constant, a binary array adder to compute a quotient of the division operation based on the array of values, the input value, and the constant, and an output circuit to output the quotient.