18390404. POWER OPTIMIZED BLEND simplified abstract (Intel Corporation)

POWER OPTIMIZED BLEND

Organization Name

Intel Corporation

Inventor(s)

Theo Drane of El Dorado Hills CA (US)

POWER OPTIMIZED BLEND - A simplified explanation of the abstract

This abstract first appeared for US patent application 18390404 titled 'POWER OPTIMIZED BLEND

Simplified Explanation

The abstract describes a blend circuit designed to optimize power consumption during the blending of two input color values, particularly when the input colors are similar. When blending identical input color values, a portion of the blend circuit can be bypassed to further reduce power consumption.

• The blend circuit is configured to reduce dynamic power consumption during color blending.
• Power optimization is achieved by bypassing a portion of the circuit when blending similar input colors.
• Clock and/or data gating can be used to further reduce power consumption during blending.

Potential Applications

The technology could be applied in various fields where color blending is required, such as image processing, graphic design, and display technologies.

Problems Solved

1. High power consumption during color blending processes. 2. Inefficient use of resources in blending identical input color values.

Benefits

1. Reduced dynamic power consumption. 2. Improved efficiency in color blending operations. 3. Enhanced performance in devices utilizing color blending technology.

Potential Commercial Applications

"Power-Optimized Blend Circuit for Color Blending" could find applications in industries such as consumer electronics, digital imaging, and printing technologies.

Possible Prior Art

Prior art may include existing blend circuits for color blending processes, but specific power optimization techniques for blending similar input colors may not have been addressed.

How does the blend circuit determine when to bypass a portion of the circuit during color blending?

The abstract does not provide details on the specific mechanism or criteria used by the blend circuit to decide when to bypass a portion of the circuit for power optimization.

What impact does the bypassing of a portion of the blend circuit have on the quality of the blended colors?

It is not clear from the abstract how bypassing a portion of the blend circuit when blending similar input colors affects the quality or accuracy of the resulting blended colors.

Original Abstract Submitted

Embodiments provided a blend circuit configured to perform a power optimized blend using blend circuitry configured such that the dynamic power consumed during the blending of two input color values is reduced when the input colors are close in value. When blending two identical input color values, a portion of the blend circuit can be bypassed and clock and/or data gated.