18379195. THIN FILM TRANSISTOR, ARRAY SUBSTRATE, DISPLAY PANEL, AND METHOD FOR FABRICATING ARRAY SUBSTRATE simplified abstract (WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.)

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THIN FILM TRANSISTOR, ARRAY SUBSTRATE, DISPLAY PANEL, AND METHOD FOR FABRICATING ARRAY SUBSTRATE

Organization Name

WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.

Inventor(s)

Jixiang Gong of Wuhan (CN)

Yixian Zhang of Wuhan (CN)

Wenxu Xianyu of Wuhan (CN)

THIN FILM TRANSISTOR, ARRAY SUBSTRATE, DISPLAY PANEL, AND METHOD FOR FABRICATING ARRAY SUBSTRATE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18379195 titled 'THIN FILM TRANSISTOR, ARRAY SUBSTRATE, DISPLAY PANEL, AND METHOD FOR FABRICATING ARRAY SUBSTRATE

Simplified Explanation

The patent application describes a method for fabricating an array substrate, as well as the resulting array substrate, display panel, and thin film transistor. The thin film transistor includes a gate electrode, an active layer, a source electrode, a drain electrode, and an interlayer insulating layer. The active layer is positioned corresponding to the gate electrode, while the source and drain electrodes are located on both sides of the active layer and electrically connected to it. The interlayer insulating layer is placed between the active layer and the source electrode, as well as between the active layer and the drain electrode. The interlayer insulating layer is designed with step-shaped contact holes, which are filled with the source and drain electrodes to establish electrical connections with the active layer.

  • The patent application describes a method for fabricating an array substrate with a thin film transistor.
  • The thin film transistor includes a gate electrode, active layer, source electrode, drain electrode, and interlayer insulating layer.
  • The active layer is positioned corresponding to the gate electrode, while the source and drain electrodes are located on both sides of the active layer and electrically connected to it.
  • The interlayer insulating layer is placed between the active layer and the source electrode, as well as between the active layer and the drain electrode.
  • The interlayer insulating layer is designed with step-shaped contact holes, which are filled with the source and drain electrodes to establish electrical connections with the active layer.

Potential Applications

  • This technology can be applied in the manufacturing of display panels, such as LCD or OLED screens.
  • It can be used in various electronic devices that require thin film transistors, including smartphones, tablets, televisions, and computer monitors.

Problems Solved

  • The method described in the patent application solves the problem of establishing electrical connections between the active layer and the source/drain electrodes in a thin film transistor.
  • The step-shaped contact holes in the interlayer insulating layer provide a reliable and efficient means of connecting the electrodes to the active layer.

Benefits

  • The fabrication method allows for the production of high-quality array substrates with improved performance.
  • The step-shaped contact holes ensure a secure and stable electrical connection between the active layer and the source/drain electrodes.
  • The resulting thin film transistors can enhance the overall functionality and efficiency of display panels and electronic devices.


Original Abstract Submitted

A method for fabricating an array substrate, the array substrate, a display panel, and a thin film transistor are provided. The thin film transistor includes a gate electrode, an active layer, a source electrode, a drain electrode, and an interlayer insulating layer. The active layer is disposed corresponding to the gate electrode. The source electrode and the drain electrode are disposed at both sides of the active layer and electrically connected to the active layer. The interlayer insulating layer is disposed between the active layer and the source electrode, and between the active layer and the drain electrode. The interlayer insulating layer is provided with step-shaped contact holes. The source electrode and the drain electrode are filled in the contact holes and electrically connected to the active layer.

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