18369684. INTERCONNECTION STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
INTERCONNECTION STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Organization Name
Inventor(s)
Junyun Kweon of Cheonan-si (KR)
HYUNSU Hwang of Siheung-si (KR)
INTERCONNECTION STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18369684 titled 'INTERCONNECTION STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
Simplified Explanation
The disclosed patent application describes interconnection patterns and semiconductor packages. Here is a simplified explanation of the abstract:
- The interconnection pattern consists of multiple layers, including a first dielectric layer, a first interconnection pattern, and a first barrier layer.
- The first barrier layer is positioned between the first interconnection pattern and the first dielectric layer.
- The first top surface of the first barrier layer is at a lower level compared to the second top surface of the first dielectric layer and the third top surface of the first interconnection pattern.
- A second barrier layer is placed on top of the first barrier layer, and a second dielectric layer is added on top of the first dielectric layer, first interconnection pattern, and second barrier layer.
- A second interconnection pattern is formed in the second dielectric layer and is electrically connected to the first interconnection pattern.
Potential applications of this technology:
- Semiconductor packaging and interconnection in electronic devices.
- Integrated circuits and microchips.
Problems solved by this technology:
- Improved interconnection reliability and performance.
- Enhanced protection against electrical interference and damage.
Benefits of this technology:
- Higher efficiency and functionality of semiconductor packages.
- Increased durability and lifespan of electronic devices.
- Improved signal transmission and reduced signal loss.
Original Abstract Submitted
Disclosed are interconnection patterns and semiconductor packages including the same. The interconnection pattern comprises a first dielectric layer, a first interconnection pattern in the first dielectric layer, a first barrier layer between the first interconnection pattern and the first dielectric layer, a first top surface of the first barrier layer located at a level lower than that of a second top surface of the first dielectric layer and lower than that of a third top surface of the first interconnection pattern, a second barrier layer on the first barrier layer, the second barrier layer interposed between the first interconnection pattern and the first dielectric layer, a second dielectric layer on the first dielectric layer, the first interconnection pattern, and the second barrier layer, and a second interconnection pattern formed in the second dielectric layer and electrically coupled to the first interconnection pattern.
