18368309. SEMICONDUCTOR PACKAGE INCLUDING ALIGNMENT MARKS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
SEMICONDUCTOR PACKAGE INCLUDING ALIGNMENT MARKS
Organization Name
Inventor(s)
SEMICONDUCTOR PACKAGE INCLUDING ALIGNMENT MARKS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18368309 titled 'SEMICONDUCTOR PACKAGE INCLUDING ALIGNMENT MARKS
Simplified Explanation
The semiconductor package described in the patent application includes a base structure, a semiconductor chip, a package body layer, a redistribution structure, and alignment marks.
- Base structure with fan-in area and fan-out areas
- Semiconductor chip located in the fan-in area
- Package body layer covering the semiconductor chip in the fan-in area and fan-out areas
- Redistribution structure on the package body layer
- Alignment marks on the redistribution structure with multiple metal layers
- Auxiliary patterns under the alignment marks to aid in recognition
Potential Applications
- Semiconductor packaging industry
- Electronics manufacturing
Problems Solved
- Improved alignment and recognition of alignment marks
- Enhanced packaging of semiconductor chips
Benefits
- Better accuracy in alignment during manufacturing process
- Increased efficiency in semiconductor packaging
- Enhanced overall performance of electronic devices
Original Abstract Submitted
A semiconductor package includes a base structure having a fan-in area and fan-out areas surrounding the fan-in area, a semiconductor chip in the fan-in area, a package body layer in the fan-in area and the fan-out areas and covering the semiconductor chip, a redistribution structure on the package body layer, and alignment marks on the redistribution structure in a plan view. Each of the alignment marks includes a plurality of metal layers, and a plurality of auxiliary patterns are in the redistribution structure under the alignment marks to assist in recognition of the alignment marks.
