18365452. SEMICONDUCTOR DEVICE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
Changmin Park of Suwon-si (KR)
SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18365452 titled 'SEMICONDUCTOR DEVICE
Simplified Explanation
The semiconductor device described in the patent application includes:
- A substrate
- First and second fin structures extending on the substrate in a first direction, with different widths
- First gate lines on the first fin portion and the second fin structure, extending in a second direction
- Second gate lines on the second fin portion and the second fin structure, extending in the second direction
- A third gate line on the second fin structure, between the first and second gate lines
- A device isolation pattern connected to an end portion of the third gate, extending between the first and second fin portions
Potential applications of this technology:
- Advanced semiconductor devices
- High-performance integrated circuits
Problems solved by this technology:
- Enhancing the performance and efficiency of semiconductor devices
- Improving the integration density of components on a chip
Benefits of this technology:
- Increased speed and efficiency of electronic devices
- Higher integration density leading to smaller and more compact devices
- Improved overall performance of semiconductor devices
Original Abstract Submitted
A semiconductor device is provided, the semiconductor device including; a substrate; a first fin structure extending on the substrate in a first direction, and having a first fin portion having a first width and a second fin portion having a second width; a second fin structure extending on the substrate in the first direction, and having the second width; first gate lines disposed on the first fin portion and the second fin structure, and extending in a second direction; second gate lines disposed on the second fin portion and the second fin structure, and extending in the second direction; a third gate line disposed on the second fin structure, and extending in the second direction between the first and second gate lines; and a device isolation pattern connected to an end portion of the third gate, and extending between the first and second fin portions.
