18364616. EMBEDDED FERROELECTRIC FINFET MEMORY DEVICE simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

EMBEDDED FERROELECTRIC FINFET MEMORY DEVICE

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Bo-Feng Young of Taipei (TW)

Chung-Te Lin of Tainan City (TW)

Sai-Hooi Yeong of Zhubei City (TW)

Yu-Ming Lin of Hsinchu City (TW)

Sheng-Chih Lai of Hsinchu County (TW)

Chih-Yu Chang of New Taipei City (TW)

Han-Jong Chia of Hsinchu City (TW)

EMBEDDED FERROELECTRIC FINFET MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18364616 titled 'EMBEDDED FERROELECTRIC FINFET MEMORY DEVICE

Simplified Explanation

The present disclosure describes a method of forming a ferroelectric memory device. The method involves forming a pair of source/drain regions in a substrate, followed by the formation of a gate dielectric and a gate electrode over the substrate and between the pair of source/drain regions. A polarization switching structure is then formed directly on the top surface of the gate electrode.

• The polarization switching structure is arranged directly on the gate electrode, allowing for a smaller pad size and more flexible area ratio tuning compared to traditional methods.
• Placing the polarization switching structure on top of the gate electrode also allows for better control of the quality of the ferroelectric structure, as the process of forming the gate electrode can withstand higher annealing temperatures.

Potential applications of this technology:

• Ferroelectric memory devices can be used in various electronic devices, such as smartphones, tablets, and computers, to store data.
• The smaller pad size and improved control of the ferroelectric structure quality can lead to more efficient and reliable memory devices.

Problems solved by this technology:

• Traditional methods of arranging the polarization switching structure under the gate electrode with aligned sidewalls and the same lateral dimensions can limit the flexibility and area ratio tuning of the device.
• The process of forming the gate electrode in traditional methods may not be able to withstand higher annealing temperatures, leading to lower quality ferroelectric structures.

Benefits of this technology:

• The method described in the patent allows for a smaller pad size and more flexible area ratio tuning, improving the overall efficiency and performance of the ferroelectric memory device.
• By placing the polarization switching structure directly on top of the gate electrode, the quality of the ferroelectric structure can be better controlled, leading to more reliable and durable memory devices.

Original Abstract Submitted

Various embodiments of the present disclosure are directed towards a method of forming a ferroelectric memory device. In the method, a pair of source/drain regions is formed in a substrate. A gate dielectric and a gate electrode are formed over the substrate and between the pair of source/drain regions. A polarization switching structure is formed directly on a top surface of the gate electrode. By arranging the polarization switching structure directly on the gate electrode, smaller pad size can be realized, and more flexible area ratio tuning can be achieved compared to arranging the polarization switching structure under the gate electrode with the aligned sidewall and same lateral dimensions. In addition, since the process of forming gate electrode can endure higher annealing temperatures, such that quality of the ferroelectric structure is better controlled.