18358387. MEMORY SYSTEM AND POWER CONTROL CIRCUIT simplified abstract (Kioxia Corporation)
Contents
- 1 MEMORY SYSTEM AND POWER CONTROL CIRCUIT
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY SYSTEM AND POWER CONTROL CIRCUIT - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
MEMORY SYSTEM AND POWER CONTROL CIRCUIT
Organization Name
Inventor(s)
Hajime Matsumoto of Higashimurayama (JP)
MEMORY SYSTEM AND POWER CONTROL CIRCUIT - A simplified explanation of the abstract
This abstract first appeared for US patent application 18358387 titled 'MEMORY SYSTEM AND POWER CONTROL CIRCUIT
Simplified Explanation
The patent application describes a memory system with a power control circuit that includes DC/DC converters to supply power to the nonvolatile memory and controller. One of the DC/DC converters transitions to a forced pulse width modulation mode when the memory system switches from low power consumption mode to normal operation mode.
- The memory system includes a nonvolatile memory, a controller, and a power control circuit.
- The power control circuit controls power supply to the controller and nonvolatile memory using DC/DC converters.
- The DC/DC converters supply internal power supply voltage to circuit blocks in the memory and controller.
- A specific DC/DC converter transitions to forced pulse width modulation mode when the memory system switches modes.
Potential Applications
The technology described in this patent application could be applied in various electronic devices that require efficient power management, such as smartphones, tablets, laptops, and IoT devices.
Problems Solved
This technology solves the problem of optimizing power consumption in memory systems by efficiently controlling power supply to the nonvolatile memory and controller based on the system's operational mode.
Benefits
The benefits of this technology include improved power efficiency, extended battery life in portable devices, and enhanced overall performance of electronic devices utilizing the memory system.
Potential Commercial Applications
A potential commercial application of this technology could be in the development of energy-efficient storage solutions for consumer electronics, leading to longer device usage on a single charge.
Possible Prior Art
One possible prior art for this technology could be the use of DC/DC converters in memory systems for power management purposes. However, the specific implementation of transitioning to forced pulse width modulation mode based on the system's operational mode may be a novel aspect of this patent application.
Unanswered Questions
How does the forced pulse width modulation mode improve power efficiency in the memory system?
The patent application mentions the transition to forced pulse width modulation mode but does not provide detailed information on how this mode specifically enhances power efficiency.
Are there any potential drawbacks or limitations to using forced pulse width modulation in the memory system?
While the patent application highlights the benefits of transitioning to forced pulse width modulation mode, it does not address any potential drawbacks or limitations that may arise from implementing this mode in the memory system.
Original Abstract Submitted
According to one embodiment, a memory system connectable to a host includes a nonvolatile memory, a controller, and a power control circuit. The controller controls the nonvolatile memory. The power control circuit controls power to be supplied to the controller and the nonvolatile memory and includes one or more DC/DC converters. The nonvolatile memory and the controller include one or more circuit blocks. Each of the one or more DC/DC converters supplies an internal power supply voltage to one of the one or more circuit blocks. A first DC/DC converter of the one or more DC/DC converters transitions to a forced pulse width modulation mode in response to the memory system that has transitioned from a low power consumption mode to a normal operation mode.
