18357401. SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
Organization Name
Inventor(s)
SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18357401 titled 'SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
Simplified Explanation
- A semiconductor device includes a peripheral circuit structure with a cell region and an outside region. - The device also includes a cell structure on the cell region and an outside structure on the outside region. - An insulating layer is present between the dummy stacked structure and the peripheral circuit structure. - The outside structure includes a dummy stacked structure, a through electrode connected to the peripheral circuit structure, and a dummy vertical structure adjacent to the through electrode. - The dummy stacked structure consists of an upper dummy stacked structure on a lower dummy stacked structure, with upper and lower dummy patterns stacked accordingly.
Potential Applications
This technology could be applied in: - Semiconductor manufacturing - Integrated circuit design - Electronic device production
Problems Solved
- Improved efficiency in semiconductor devices - Enhanced performance of peripheral circuit structures - Better insulation and connectivity within the device
Benefits
- Increased reliability of semiconductor devices - Enhanced functionality of peripheral circuit structures - Potential for higher performance in electronic devices
Original Abstract Submitted
A semiconductor device may include a peripheral circuit structure including cell region and an outside region, a cell structure on the cell region, an outside structure on the outside region, and an insulating layer. The outside structure may include a dummy stacked structure, a through electrode penetrating the dummy stacked structure and connected to the peripheral circuit structure, and a dummy vertical structure adjacent to the through electrode and penetrating at least a portion of the dummy stacked structure. The insulating layer may be between the dummy stacked structure and the peripheral circuit structure. The dummy stacked structure may include an upper dummy stacked structure on a lower dummy stacked structure. The upper dummy stacked structure may include upper dummy patterns stacked on the lower dummy stacked structure. The lower dummy stacked structure may include lower dummy patterns stacked on the outside region.
