18357307. Parasitic Capacitance Reduction simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)

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Parasitic Capacitance Reduction

Organization Name

Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor(s)

Jia-Heng Wang of Hsinchu (TW)

Chun-Han Chen of Changhua County (TW)

I-Wen Wu of Hsinchu City (TW)

Chen-Ming Lee of Taoyuan County (TW)

Fu-Kai Yang of Hsinchu City (TW)

Mei-Yun Wang of Hsin-Chu (TW)

Parasitic Capacitance Reduction - A simplified explanation of the abstract

This abstract first appeared for US patent application 18357307 titled 'Parasitic Capacitance Reduction

Simplified Explanation

The present disclosure describes semiconductor devices and methods of forming them. Here are the key points:

  • The semiconductor device includes a fin-shaped structure that extends over a substrate in one direction.
  • An epitaxial feature is formed over the source/drain region of the fin-shaped structure.
  • A gate structure is placed over the channel region of the fin-shaped structure, perpendicular to the first direction.
  • A source/drain contact is positioned over the epitaxial feature.
  • The bottom surface of the gate structure is closer to the substrate than the bottom surface of the source/drain contact.

Potential applications of this technology:

  • This semiconductor device can be used in various electronic devices, such as smartphones, tablets, and computers.
  • It can be utilized in integrated circuits for high-performance computing, data storage, and communication systems.
  • The technology can also be applied in automotive electronics, aerospace systems, and medical devices.

Problems solved by this technology:

  • The design allows for improved performance and efficiency of the semiconductor device.
  • The epitaxial feature over the source/drain region enhances the conductivity and reduces resistance.
  • The placement of the gate structure and source/drain contact optimizes the electrical characteristics of the device.

Benefits of this technology:

  • The semiconductor device offers enhanced performance and speed due to the optimized design.
  • It provides improved conductivity and reduced resistance, leading to more efficient operation.
  • The technology enables the development of smaller and more compact electronic devices.


Original Abstract Submitted

The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device according to one embodiment of the present disclosure includes a first fin-shaped structure extending lengthwise along a first direction over a substrate, a first epitaxial feature over a source/drain region of the first fin-shaped structure, a gate structure disposed over a channel region of the first fin-shaped structure and extending along a second direction perpendicular to the first direction, and a source/drain contact over the first epitaxial feature. The bottom surface of the gate structure is closer to the substrate than a bottom surface of the source/drain contact.