18356289. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Aenee Jang of Suwon-si (KR)

Wonil Lee of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18356289 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the patent application consists of a first semiconductor chip, multiple second semiconductor chips stacked on top of the first chip, and a molded layer on the upper surface of the first chip. The second chips have narrower widths compared to the first chip. The first chip includes front-surface pads, a back-surface insulating layer divided into two regions (first and second), back-surface pads in the first region, and dummy pads in the second region. The dummy pads have a metal oxide film on their upper surface. The first chip also has a through-electrode that connects the front-surface pads and the back-surface pads. The second chips have front-surface pads, back-surface pads, and a through-electrode connecting them.

  • The semiconductor package includes multiple stacked semiconductor chips with different widths.
  • The first chip has front-surface pads, back-surface pads, and a through-electrode connecting them.
  • The second chips have front-surface pads, back-surface pads, and a through-electrode connecting them.
  • The first chip has a molded layer on its upper surface.
  • The dummy pads on the second region of the first chip have a metal oxide film on their upper surface.

Potential Applications:

  • This semiconductor package design can be used in various electronic devices, such as smartphones, tablets, and computers.
  • It can be applied in high-density integrated circuits where multiple chips need to be stacked together.

Problems Solved:

  • The design allows for stacking multiple semiconductor chips in a compact manner, saving space in electronic devices.
  • The through-electrodes provide efficient electrical connections between the front-surface and back-surface pads of the chips.

Benefits:

  • The compact design of the semiconductor package allows for miniaturization of electronic devices.
  • The through-electrodes ensure reliable and efficient electrical connections between the chips.
  • The metal oxide film on the dummy pads provides additional protection and stability to the package.


Original Abstract Submitted

A semiconductor package includes a first semiconductor chip, a plurality of second semiconductor chips stacked on the first semiconductor chip, and having widths narrower than a width of the first semiconductor chip, and a molded layer on an upper surface of the first semiconductor chip. The first semiconductor chip includes first front-surface pads, a first back-surface insulating layer divided into a first region and a second region, first back-surface pads in the first region, dummy pads in the second region, the dummy pads respectively having an upper surface on which a metal oxide film is disposed, and a first through-electrode electrically connecting the first front-surface pads and the first back-surface pads to each other. The plurality of second semiconductor chips respectively includes second front-surface pads, second back-surface pads, and a second through-electrode electrically connecting the second front-surface pads and the second back-surface pads to each other.