18351039. APPARATUS AND METHOD WITH IN-MEMORY COMPUTING (IMC) simplified abstract (Samsung Electronics Co., Ltd.)
Contents
APPARATUS AND METHOD WITH IN-MEMORY COMPUTING (IMC)
Organization Name
Inventor(s)
Seungchul Jung of Suwon-si (KR)
Soon-Wan Kwon of Suwon-si (KR)
Sungmeen Myung of Suwon-si (KR)
Dong-Jin Chang of Suwon-si (KR)
APPARATUS AND METHOD WITH IN-MEMORY COMPUTING (IMC) - A simplified explanation of the abstract
This abstract first appeared for US patent application 18351039 titled 'APPARATUS AND METHOD WITH IN-MEMORY COMPUTING (IMC)
Simplified Explanation
An apparatus and method with in-memory computing (IMC) are provided. An in-memory computing (IMC) circuit includes a plurality of memory banks, each memory bank including a bit cell configured to store a weight value and an operator configured to receive an input value, the operator being connected to the bit cell such that the operator upon receiving the input value outputs a logic operation result between the input value and the weight value, and a logic gate configured to receive the logic operation result of each of the memory banks.
- In-memory computing (IMC) circuit includes memory banks with bit cells storing weight values and operators performing logic operations between input values and weight values.
- Logic gates receive the logic operation results from each memory bank.
- The circuit enables processing and computation to be performed within the memory banks themselves, reducing the need for data movement between memory and processing units.
- Potential Applications
- Artificial intelligence and machine learning applications
- Pattern recognition tasks
- Data analytics and processing tasks
- Problems Solved
- Reduce data movement between memory and processing units
- Improve efficiency and speed of computation tasks
- Enable in-memory processing for complex algorithms
- Benefits
- Faster processing speeds
- Reduced energy consumption
- Improved performance for AI and machine learning applications
Original Abstract Submitted
An apparatus and method with in-memory computing (IMC) are provided. An in-memory computing (IMC) circuit includes a plurality of memory banks, each memory bank including a bit cell configured to store a weight value and an operator configured to receive an input value, the operator being connected to the bit cell such that the operator upon receiving the input value outputs a logic operation result between the input value and the weight value, and a logic gate configured to receive the logic operation result of each of the memory banks.
