18342415. LDO REGULATOR CAPABLE OF BEING OPERATED AT LOW VOLTAGE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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LDO REGULATOR CAPABLE OF BEING OPERATED AT LOW VOLTAGE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Hyung-Min Lee of Seoul (KR)

Hyunjun Park of Seoul (KR)

Woojoong Jung of Seoul (KR)

LDO REGULATOR CAPABLE OF BEING OPERATED AT LOW VOLTAGE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18342415 titled 'LDO REGULATOR CAPABLE OF BEING OPERATED AT LOW VOLTAGE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

Simplified Explanation

The abstract describes a low dropout (LDO) regulator with the following components:

  • One or more power transistors placed between an input node (where input voltage is applied) and an output node (where output voltage is output).
  • A voltage comparing unit that generates a comparative signal based on the difference between the output voltage and a first reference voltage.
  • A digital control unit that generates a control signal to gate the power transistors based on the comparative signal.
  • A gate driving unit that outputs a gating signal for the power transistors in response to the control signal, where the gating signal corresponds to either the input voltage or the negative of the input voltage.

Potential applications of this technology:

  • Power management systems
  • Battery-powered devices
  • Voltage regulation in electronic circuits

Problems solved by this technology:

  • Minimizing dropout voltage in regulators
  • Improving efficiency in power management
  • Providing stable output voltage levels

Benefits of this technology:

  • Enhanced voltage regulation
  • Reduced power consumption
  • Improved performance in electronic devices


Original Abstract Submitted

A low dropout (LDO) regulator includes: one or more power transistors configured to dispose between an input node and an output node, wherein the input node is a node to which an input voltage is applied and the output node is a node from which an output voltage is output; a voltage comparing unit configured to generate a comparative signal based on a difference between the output voltage and a first reference voltage; a digital control unit configured to generate a control signal for gating of the one or more power transistors in response to the comparative signal; and a gate driving unit configured to output a gating signal for the one or more power transistors in response to the control signal, wherein the gating signal is corresponding to one of the input voltage and a negative of the input voltage.