18333682. CONTACT STRUCTURE AND MANUFACTURING METHOD THEREOF simplified abstract (Taiwan Semiconductor Manufacturing Co., Ltd.)
Contents
CONTACT STRUCTURE AND MANUFACTURING METHOD THEREOF
Organization Name
Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor(s)
Chia-Hsien Yao of Hsinchu City (TW)
Fu-Kai Yang of Hsinchu City (TW)
CONTACT STRUCTURE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 18333682 titled 'CONTACT STRUCTURE AND MANUFACTURING METHOD THEREOF
Simplified Explanation
The method described in the patent application involves the following steps:
- Formation of first and second fins on a substrate.
- Formation of a gate structure over the first and second fins.
- Epitaxial growth of a first source/drain (S/D) feature on the first fin and a second S/D feature on the second fin.
- Deposition of a dielectric layer covering the first and second S/D features.
- Etching of the dielectric layer to form a trench exposing the first and second S/D features.
- Formation of a metal structure in the trench, extending from the first S/D feature to the second S/D feature.
- Performance of a cut metal process to create an opening that divides the metal structure into a first segment over the first S/D feature and a second segment over the second S/D feature.
- Deposition of an isolation feature in the opening, separating the first segment from the second segment.
Potential applications of this technology:
- This method can be used in the fabrication of semiconductor devices, particularly in the formation of metal structures and isolation features.
- It can be applied in the manufacturing of integrated circuits, where precise separation and isolation of different segments is required.
Problems solved by this technology:
- The method provides a reliable and efficient way to form metal structures and isolation features in semiconductor devices.
- It ensures proper separation and isolation of different segments, preventing interference and cross-talk between them.
Benefits of this technology:
- The method allows for the precise formation of metal structures and isolation features, improving the overall performance and functionality of semiconductor devices.
- It offers a cost-effective and scalable solution for the fabrication of integrated circuits.
- The technology enables the production of high-quality semiconductor devices with enhanced reliability and performance.
Original Abstract Submitted
A method includes forming first and second fins disposed on a substrate, forming a gate structure over the first and second fins, epitaxially growing a first source/drain (S/D) feature on the first fin and a second S/D feature on the second fin, depositing a dielectric layer covering the first and second S/D features, etching the dielectric layer to form a trench exposing the first and second S/D features, forming a metal structure in the trench and extending from the first S/D feature to the second S/D feature, performing a cut metal process to form an opening dividing the metal structure into a first segment over the first S/D feature and a second segment over the second S/D feature, and depositing an isolation feature in the opening. The isolation feature separates the first segment from the second segment.
