18331973. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)

SEMICONDUCTOR PACKAGE

Organization Name

Samsung Electronics Co., Ltd.

Inventor(s)

In Lee of Suwon-si (KR)

Taeyoung Kim of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18331973 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the patent application includes a base substrate, a first semiconductor chip mounted on the base substrate, and a second semiconductor chip mounted on the first semiconductor chip. The first semiconductor chip has conductive connection structures with different pitch intervals in different directions, and the second semiconductor chip also has conductive connection structures with similar pitch intervals in different directions. The first conductive connection structures include power connection structures, ground connection structures, and dummy structures.

• The semiconductor package includes a base substrate, first semiconductor chip, and second semiconductor chip.
• The first semiconductor chip has conductive connection structures with different pitch intervals in different directions.
• The second semiconductor chip has conductive connection structures with similar pitch intervals in different directions.
• The first conductive connection structures include power connection structures, ground connection structures, and dummy structures.

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1. 1. 1. Potential Applications

• Advanced semiconductor packaging technology for electronic devices.
• High-density interconnects for improved performance in integrated circuits.

1. 1. 1. Problems Solved

• Efficient use of space in semiconductor packages.
• Enhanced connectivity between semiconductor chips.

1. 1. 1. Benefits

• Increased functionality in smaller electronic devices.
• Improved signal transmission between semiconductor chips.
• Enhanced overall performance of electronic systems.

Original Abstract Submitted

A semiconductor package includes a base substrate, a first semiconductor chip mounted on the base substrate, and a second semiconductor chip mounted on the first semiconductor chip. The first semiconductor includes first conductive connection structures that have a first pitch interval in a first direction and a second pitch interval in a second direction, and the second semiconductor chip includes second conductive connection structures that have the first pitch interval in the first direction and the second pitch interval in the second direction. The first conductive connection structures include first power connection structures, first ground connection structures, and first dummy structures. The first ground connection structure or the first dummy structure is between two first power connection structures neighboring in the first direction and between two first power connection structures neighboring in the second direction among the first power connection structures.