18321490. UNIFIED ADDRESS TRANSLATION FOR VIRTUALIZATION OF INPUT/OUTPUT DEVICES simplified abstract (Intel Corporation)
UNIFIED ADDRESS TRANSLATION FOR VIRTUALIZATION OF INPUT/OUTPUT DEVICES
Organization Name
Inventor(s)
Utkarsh Y. Kakaiya of El Dorado Hills CA (US)
Sanjay Kumar of Hillsboro OR (US)
Rajesh M. Sankaran of Portland OR (US)
Philip R. Lantz of Cornelius OR (US)
UNIFIED ADDRESS TRANSLATION FOR VIRTUALIZATION OF INPUT/OUTPUT DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18321490 titled 'UNIFIED ADDRESS TRANSLATION FOR VIRTUALIZATION OF INPUT/OUTPUT DEVICES
Simplified Explanation
The abstract describes a patent application for a system that enables unified address translation for virtualization of input/output devices. The system includes circuitry to locate context entries and process address space identifier (PASID) entries using device identifiers and PASIDs. The context entry contains a page-table pointer or a PASID, while the PASID-entry contains a first-level or second-level page-table pointer. Control fields indicate which page-table pointer to use.
- The system enables unified address translation for virtualization of input/output devices.
- It uses device identifiers and PASIDs to locate context entries and PASID entries.
- Context entries contain page-table pointers or PASIDs, while PASID-entries contain first-level or second-level page-table pointers.
- Control fields indicate which page-table pointer to use.
Potential Applications
- Virtualization of input/output devices in computer systems.
- Improved address translation for virtualized devices.
Problems Solved
- Simplifies the address translation process for virtualized input/output devices.
- Enables efficient and unified address translation for virtualized devices.
Benefits
- Improved performance and efficiency in virtualization of input/output devices.
- Simplified management of address translation for virtualized devices.
Original Abstract Submitted
Embodiments of apparatuses, methods, and systems for unified address translation for virtualization of input/output devices are described. In an embodiment, an apparatus includes first circuitry to use at least an identifier of a device to locate a context entry and second circuitry to use at least a process address space identifier (PASID) to locate a PASID-entry. The context entry is to include at least one of a page-table pointer to a page-table translation structure and a PASID. The PASID-entry is to include at least one of a first-level page-table pointer to a first-level translation structure and a second-level page-table pointer to a second-level translation structure. The PASID is to be supplied by the device. At least one of the apparatus, the context entry, and the PASID entry is to include one or more control fields to indicate whether the first-level page-table pointer or the second-level page-table pointer is to be used.
