18317521. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

From WikiPatents
Jump to navigation Jump to search

SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Sangcheon Park of Suwon-si (KR)

Dongwoo Kang of Suwon-si (KR)

Unbyoung Kang of Suwon-si (KR)

Soohwan Lee of Suwon-si (KR)

Hyunchul Jung of Suwon-si (KR)

Youngkun Jee of Suwon-si (KR)

SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18317521 titled 'SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the abstract includes a substrate with a TSV structure, passivation layers, and bumping pads with different seed layers.

  • The semiconductor package includes a substrate with a TSV structure for improved connectivity.
  • Passivation layers are present on both surfaces of the substrate for protection and insulation.
  • Bumping pads inside the passivation layers provide contact points for external connections.
  • The first bumping pad has a first pad plug with a surrounding first seed layer.
  • The second bumping pad has a second pad plug with a surrounding second seed layer.
  • The first and second seed layers have different reactivities to water, enhancing their functionality.

Potential Applications

  • Advanced semiconductor devices
  • High-speed data processing systems
  • Microelectronics industry

Problems Solved

  • Improved connectivity in semiconductor packages
  • Enhanced protection and insulation of components
  • Reliable external connections

Benefits

  • Increased efficiency in data processing
  • Enhanced durability and reliability
  • Improved performance of semiconductor devices


Original Abstract Submitted

Provided is a semiconductor package including a substrate including a first surface and a second surface opposite to the first surface, a connecting circuit arranged on the first surface of the substrate, a through silicon via (TSV) structure penetrating the substrate, a first passivation layer arranged on the connecting circuit, a second passivation layer arranged on the second surface, a first bumping pad arranged inside the first passivation layer, and a second bumping pad arranged inside the second passivation layer, wherein the first bumping pad includes a first pad plug, and a first seed layer surrounding a lower surface and sidewalls of the first pad plug, wherein the second bumping pad includes a second pad plug, and a second seed layer surrounding an upper surface and sidewalls of the second pad plug, and wherein the first seed layer and the second seed layer include materials having different reactivities to water.