18307698. METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS simplified abstract (Micron Technology, Inc.)
Contents
- 1 METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Original Abstract Submitted
METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS
Organization Name
Inventor(s)
Pengyuan Zheng of Boise ID (US)
Yongjun J. Hu of Boise ID (US)
Pavan Reddy Kumar Aella of Eagle ID (US)
David Ross Economy of Boise ID (US)
Brittany L. Kohoutek of Boise ID (US)
METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS - A simplified explanation of the abstract
This abstract first appeared for US patent application 18307698 titled 'METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, MEMORY DEVICES, AND ELECTRONIC SYSTEMS
Simplified Explanation
The abstract describes a method of forming a microelectronic device that involves several steps including the formation of conductive interconnect structures, metal silicide material, and a dielectric material. Openings are then formed and filled with additional isolation material. Related devices and systems are also mentioned.
- The method involves forming conductive interconnect structures that extend vertically through isolation material.
- Metal silicide material is formed on the interconnect structures and the first isolation material.
- A conductive material is formed on the metal silicide material.
- A dielectric material is formed over the conductive material.
- Openings are formed vertically through the dielectric material, conductive material, metal silicide material, and isolation material.
- Additional isolation material is formed to fill the openings partially and extend over remaining portions of the dielectric material.
Potential Applications
This technology can be applied in various microelectronic devices, such as integrated circuits, microprocessors, and memory devices.
Problems Solved
The method described in the patent application solves the problem of forming conductive interconnect structures and filling openings in a microelectronic device, ensuring proper electrical connections and isolation.
Benefits
The use of metal silicide material and additional isolation material improves the conductivity and isolation properties of the microelectronic device. The vertical extension of conductive interconnect structures allows for efficient use of space in the device. The method provides a reliable and efficient way of forming microelectronic devices.
Original Abstract Submitted
A method of forming a microelectronic device includes forming conductive interconnect structures vertically extending through isolation material to conductive contact structures coupled to pillar structures, forming a metal silicide material on the interconnect structures and the first isolation material, forming a conductive material on the metal silicide material, and forming a dielectric material over the conductive material. The method further includes forming openings vertically extending through the dielectric material, the conductive material, the metal silicide material, and the isolation material and forming additional isolation material to extend over remaining portions of the dielectric material and at least partially fill the openings. Related devices and systems are disclosed.
