18304345. MEMORY, CONTROLLER, MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM simplified abstract (SK hynix Inc.)
Contents
- 1 MEMORY, CONTROLLER, MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY, CONTROLLER, MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Unanswered Questions
- 1.11 Original Abstract Submitted
MEMORY, CONTROLLER, MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM
Organization Name
Inventor(s)
Jin Ho Baek of Gyeonggi-do (KR)
Young Pyo Joo of Gyeonggi-do (KR)
MEMORY, CONTROLLER, MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 18304345 titled 'MEMORY, CONTROLLER, MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM
Simplified Explanation
The memory controller described in the abstract includes a data separator, address generator, command generator, and control block to efficiently write data into different storage regions in a memory, reducing power consumption.
- Data separator separates host write data into upper data and lower data.
- Address generator generates first and second addresses based on a host address.
- Command generator creates first commands to write upper data into a first storage region and second commands to write lower data into a second storage region.
- Control block manages the address and command generators to optimize power consumption between the two storage regions.
Potential Applications
This technology can be applied in various memory systems, such as computer RAM, solid-state drives, and embedded systems.
Problems Solved
1. Efficient data writing: By separating and writing data into different storage regions, power consumption is optimized. 2. Address generation: The system automates the process of generating addresses for data storage, reducing manual intervention.
Benefits
1. Power efficiency: By controlling the power consumption between storage regions, overall energy usage is reduced. 2. Data organization: The separation of data into upper and lower sections allows for better organization and retrieval.
Potential Commercial Applications
"Optimized Power Memory Controller Technology for Efficient Data Writing" can be utilized in the development of energy-efficient memory controllers for various electronic devices, leading to longer battery life and improved performance.
Possible Prior Art
One potential prior art could be memory controllers that do not optimize power consumption between different storage regions, leading to higher energy usage and reduced efficiency.
Unanswered Questions
How does this technology compare to existing memory controllers in terms of power consumption optimization?
This article does not provide a direct comparison with other memory controllers in the market to showcase the efficiency of this technology.
Are there any limitations to the address and command generation process in this memory controller?
The abstract does not mention any potential limitations or challenges faced in the address and command generation process, leaving room for further exploration into the system's capabilities.
Original Abstract Submitted
A memory controller includes: a data separator configured to separate host write data into upper data and lower data; an address generator configured to generate a first address and a second address based on a host address; a command generator configured to generate one or more first commands for writing the upper data into a first storage region that is selected based on the first address in a memory, and one or more second commands for writing the lower data into a second storage region that is selected based on the second address in the memory; and a control block configured to control the address generator and the command generator to make a difference in power consumption between the first storage region and the second storage region.
