18301374. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Hwan Pil Park of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18301374 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the abstract includes a substrate, two chip stacks, and underfill patterns.
- The first chip stack on the substrate contains a first semiconductor chip, with an underfill pattern on one side and a protection structure on top.
- The second chip stack, containing a second semiconductor chip, is stacked offset to the first chip stack.
- Both chip stacks have adhesive layers under the semiconductor chips and protection structures on top.
- The second adhesive layer extends to one side of the first chip protection structure, with the underfill pattern connecting the two chip stacks.
- Potential Applications:**
- Semiconductor packaging industry
- Electronics manufacturing
- Problems Solved:**
- Ensuring proper alignment and protection of semiconductor chips in a package
- Improving the reliability and durability of semiconductor packages
- Benefits:**
- Enhanced structural integrity of semiconductor packages
- Improved thermal performance
- Increased longevity of electronic devices
Original Abstract Submitted
A semiconductor package includes a substrate, a first chip stack on the substrate and including a first semiconductor chip, an underfill pattern on a first side of the first chip stack, and a second chip stack on the first chip stack and including a second semiconductor chip. The second chip stack is stacked so as to be offset to the first chip stack. The first chip stack includes a first adhesive layer under the first semiconductor chip and a first chip protection structure on the first semiconductor chip. The second chip stack includes a second adhesive layer under the second semiconductor chip and a second chip protection structure on the second semiconductor chip. An extension portion of the second adhesive layer is on one side of the first chip protection structure, and the underfill pattern extends from the first side of the first chip stack to the extension portion.
