18299896. SEMICONDUCTOR PACKAGE simplified abstract (Samsung Electronics Co., Ltd.)
Contents
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
Kyung Don Mun of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18299896 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the patent application includes a substrate, a first chip stack with multiple semiconductor chips stacked on the substrate, a second chip stack with multiple semiconductor chips stacked on the first chip stack, and thermal conductive layers.
- The first thermal conductive layers are located between the substrate and the first chip stack, or between adjacent first semiconductor chips.
- The second thermal conductive layers are located between the first chip stack and the second chip stack, or between adjacent second semiconductor chips.
- The thermal conductivity of the second thermal interface material in the second thermal conductive layers is higher than that of the first thermal interface material in the first thermal conductive layers.
- The stiffness of the first thermal interface material is higher than that of the second thermal interface material.
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- Potential Applications
- High-performance computing systems
- Data centers
- Automotive electronics
- Aerospace technology
- Problems Solved
- Improved thermal management in stacked semiconductor packages
- Enhanced heat dissipation capabilities
- Reduction of thermal resistance and hot spots
- Benefits
- Increased reliability and longevity of semiconductor devices
- Improved overall performance and efficiency
- Enhanced thermal stability and reduced risk of overheating
Original Abstract Submitted
A semiconductor package includes a substrate, a first chip stack including a plurality of first semiconductor chips sequentially stacked on the substrate, and a second chip stack including a plurality of second semiconductor chips sequentially stacked on the first chip stack, and first and second pluralities of thermal conductive layers. The first thermal conductive layers are each between the substrate and the first chip stack, or between adjacent first semiconductor chips. The second thermal conductive layers are each between the first chip stack and the second chip stack, or between adjacent second semiconductor chips. A thermal conductivity of a second thermal interface material of the second thermal conductive layers is greater than a thermal conductivity of a first thermal interface material of the first thermal conductive layers, and a stiffness of the first thermal interface material is greater than a stiffness of the second thermal interface material.
