18298702. SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18298702 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
Simplified Explanation
The semiconductor package described in the patent application includes a substrate with a redistribution member that has two opposing surfaces. The first surface of the redistribution member has pad structures and a redistribution layer electrically connected to the pad structures. The second surface of the redistribution member has an interconnect chip with an interconnect circuit electrically connected to the redistribution layer. A via structure is located around the interconnect chip and electrically connected to the redistribution layer. An encapsulant encapsulates at least a portion of the interconnect chip and the via structure, and bump structures are disposed on the encapsulant. Additionally, there are two chip structures on the first surface of the redistribution member that are electrically connected to the pad structures.
- The semiconductor package includes a redistribution member with pad structures and a redistribution layer, allowing for efficient electrical connections.
- The interconnect chip on the second surface of the redistribution member provides an interconnect circuit for electrical connectivity.
- The via structure around the interconnect chip enables electrical connections to the redistribution layer.
- The encapsulant protects and encapsulates the interconnect chip and via structure.
- The bump structures on the encapsulant provide additional electrical connections.
- The chip structures on the first surface of the redistribution member are electrically connected to the pad structures, enhancing the overall functionality of the package.
Potential applications of this technology:
- Semiconductor packaging for electronic devices such as smartphones, tablets, and computers.
- Integrated circuits for automotive electronics, medical devices, and industrial equipment.
Problems solved by this technology:
- Efficient electrical connections between different components in a semiconductor package.
- Protection and encapsulation of sensitive interconnect chips and via structures.
- Enhanced functionality and connectivity through chip structures and pad structures.
Benefits of this technology:
- Improved performance and reliability of electronic devices.
- Compact and space-saving design for semiconductor packages.
- Cost-effective manufacturing processes for semiconductor packaging.
Original Abstract Submitted
A semiconductor package includes: a substrate including a redistribution member having a first surface and a second surface, opposing each other, and including pad structures disposed on the first surface and a redistribution layer electrically connected to the pad structures, an interconnect chip disposed on the second surface of the redistribution member and including an interconnect circuit electrically connected to the redistribution layer, a via structure disposed around the interconnect chip and electrically connected to the redistribution layer, an encapsulant encapsulating at least a portion of each of the interconnect chip and the via structure, and bump structures disposed on the encapsulant; and a first chip structure and a second chip structure disposed on the first surface of the redistribution member and electrically connected to the pad structures.
