18244741. SINGLE GATED 3D NANOWIRE INVERTER FOR HIGH DENSITY THICK GATE SOC APPLICATIONS simplified abstract (Intel Corporation)

SINGLE GATED 3D NANOWIRE INVERTER FOR HIGH DENSITY THICK GATE SOC APPLICATIONS

Organization Name

Intel Corporation

Inventor(s)

Rahul Ramaswamy of Portland OR (US)

Walid M. Hafez of Portland OR (US)

Tanuj Trivedi of Hillsboro OR (US)

Jeong Dong Kim of Scappoose OR (US)

Ting Chang of Portland OR (US)

Babak Fallahazad of Portland OR (US)

Hsu-Yu Chang of Hillsboro OR (US)

Nidhi Nidhi of Hillsboro OR (US)

SINGLE GATED 3D NANOWIRE INVERTER FOR HIGH DENSITY THICK GATE SOC APPLICATIONS - A simplified explanation of the abstract

This abstract first appeared for US patent application 18244741 titled 'SINGLE GATED 3D NANOWIRE INVERTER FOR HIGH DENSITY THICK GATE SOC APPLICATIONS

Simplified Explanation

The abstract describes a semiconductor device and a method of forming such a device. The device includes a substrate and two transistors of different conductivity types. Each transistor has a semiconductor channel and a gate electrode surrounding the channel. The gate electrodes of the two transistors are made of different materials.

• The semiconductor device includes two transistors of different conductivity types.
• Each transistor has a semiconductor channel and a gate electrode surrounding the channel.
• The gate electrodes of the two transistors are made of different materials.

Potential Applications

• This technology can be used in the manufacturing of various semiconductor devices such as integrated circuits and microprocessors.
• It can be applied in the development of high-performance electronic devices that require efficient control of electrical currents.

Problems Solved

• The use of different materials for the gate electrodes of the transistors allows for improved performance and functionality of the semiconductor device.
• It addresses the need for precise control of electrical currents in semiconductor devices.

Benefits

• The use of different materials for the gate electrodes enables better optimization of the transistor's performance.
• It provides enhanced control over the electrical characteristics of the semiconductor device.
• The technology can lead to improved efficiency and reliability of electronic devices.

Original Abstract Submitted

Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment, a semiconductor device comprises a substrate, and a first transistor of a first conductivity type over the substrate. In an embodiment, the first transistor comprises a first semiconductor channel, and a first gate electrode around the first semiconductor channel. In an embodiment, the semiconductor device further comprises a second transistor of a second conductivity type above the first transistor. The second transistor comprises a second semiconductor channel, and a second gate electrode around the second semiconductor channel. In an embodiment, the second gate electrode and the first gate electrode comprise different materials.