18244689. PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES simplified abstract (Intel Corporation)
Contents
- 1 PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Original Abstract Submitted
PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES
Organization Name
Inventor(s)
Pramod Malatkar of Chandler AZ (US)
Weng Hong Teh of Phoenix AZ (US)
John S. Guzek of Chandler AZ (US)
Robert L. Sankman of Phoenix AZ (US)
PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18244689 titled 'PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL) PACKAGES
Simplified Explanation
The abstract describes a semiconductor package with a bumpless die-package interface and methods of fabrication. The package includes a substrate with a lowermost layer of conductive vias and a semiconductor die embedded in the substrate. The die has an uppermost layer of conductive lines, one of which is directly connected to a conductive via of the substrate.
- The semiconductor package has a bumpless die-package interface.
- The package includes a substrate with a lowermost layer of conductive vias.
- A semiconductor die is embedded in the substrate.
- The die has an uppermost layer of conductive lines.
- One of the conductive lines is directly connected to a conductive via of the substrate.
Potential Applications
- Semiconductor packaging industry
- Electronics manufacturing industry
Problems Solved
- Simplifies the die-package interface
- Improves the connectivity between the die and the substrate
Benefits
- Enhanced performance and reliability of semiconductor packages
- Streamlined fabrication process
- Cost-effective solution for semiconductor packaging
Original Abstract Submitted
A packaged semiconductor die with a bumpless die-package interface and methods of fabrication are described. For example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines, one of which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate. In another example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines with a layer of conductive vias disposed thereon. At least one of the conductive lines is coupled directly to a conductive via of the semiconductor die which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate.
