18244559. TRANSMITTING AND RECEIVING CIRCUIT AND TEST DEVICE INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
TRANSMITTING AND RECEIVING CIRCUIT AND TEST DEVICE INCLUDING THE SAME
Organization Name
Inventor(s)
Seong Kwan Lee of Suwon-si (KR)
Hyung-Sun Ryu of Suwon-si (KR)
Cheol Min Park of Suwon-si (KR)
TRANSMITTING AND RECEIVING CIRCUIT AND TEST DEVICE INCLUDING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 18244559 titled 'TRANSMITTING AND RECEIVING CIRCUIT AND TEST DEVICE INCLUDING THE SAME
Simplified Explanation
The patent application describes a transmitting and receiving circuit utilizing a first CMOS inverter and a first calculation amplifier to process signals.
- The circuit includes a first CMOS inverter that receives a power supply signal and an input signal.
- A first calculation amplifier is connected to the output terminal of the first CMOS inverter, with a resistor connected between the output terminal of the amplifier and a node.
- The output terminal and inverted input terminal of the first calculation amplifier are connected to each other.
- The first output signal produced by the circuit is smaller in level than the input signal and is output to the first node.
Potential Applications
- Communication systems
- Signal processing devices
- Data transmission equipment
Problems Solved
- Signal amplification and processing
- Noise reduction in signal transmission
- Efficient power consumption in circuits
Benefits
- Improved signal quality
- Reduced noise interference
- Energy-efficient circuit design
Original Abstract Submitted
A transmitting and receiving circuit may include a first CMOS inverter configured to receive a first power supply signal and a first input signal. The transmitting and receiving circuit may include a first calculation amplifier including a non-inverted input terminal connected to an output terminal of the first CMOS inverter, and a first resistor connected between the output terminal of the first calculation amplifier and a first node. The output terminal of the first calculation amplifier and an inverted input terminal of the first calculation amplifier may be connected to each other. A first output signal may have a level smaller than that of the first input signal and may be output to the first node.
