18238212. NONVOLATILE MEMORY DEVICE, OPERATION METHOD OF A NONVOLATILE MEMORY DEVICE, AND OPERATION METHOD OF A CONTROLLER simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
- 1 NONVOLATILE MEMORY DEVICE, OPERATION METHOD OF A NONVOLATILE MEMORY DEVICE, AND OPERATION METHOD OF A CONTROLLER
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 NONVOLATILE MEMORY DEVICE, OPERATION METHOD OF A NONVOLATILE MEMORY DEVICE, AND OPERATION METHOD OF A CONTROLLER - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Original Abstract Submitted
NONVOLATILE MEMORY DEVICE, OPERATION METHOD OF A NONVOLATILE MEMORY DEVICE, AND OPERATION METHOD OF A CONTROLLER
Organization Name
Inventor(s)
NONVOLATILE MEMORY DEVICE, OPERATION METHOD OF A NONVOLATILE MEMORY DEVICE, AND OPERATION METHOD OF A CONTROLLER - A simplified explanation of the abstract
This abstract first appeared for US patent application 18238212 titled 'NONVOLATILE MEMORY DEVICE, OPERATION METHOD OF A NONVOLATILE MEMORY DEVICE, AND OPERATION METHOD OF A CONTROLLER
Simplified Explanation
The patent application describes a memory device with a first substrate, peripheral circuit, metal bonding layers, memory cell array, and a second substrate. The peripheral circuit includes a page buffer circuit and a pass/failure checker.
- The memory device includes a first substrate, peripheral circuit, metal bonding layers, memory cell array, and a second substrate.
- The page buffer circuit in the peripheral circuit receives a verification result through the metal bonding layers and divides it into stages.
- The page buffer circuit sequentially outputs the verification result for each stage.
- The pass/failure checker in the peripheral circuit performs a counting operation on each stage to generate accumulated values.
- The pass/failure checker compares the accumulated values with a reference value that increases from an initial value.
- The initial value is set by an external memory controller.
Potential Applications
- Memory devices with improved verification and counting operations.
- Enhanced performance and reliability in memory systems.
Problems Solved
- Simplified verification and counting operations in memory devices.
- Improved accuracy and efficiency in memory systems.
Benefits
- Increased reliability and accuracy in memory operations.
- Simplified design and implementation of memory devices.
- Enhanced performance and functionality in memory systems.
Original Abstract Submitted
A memory device including a first substrate, a peripheral circuit provided on the first substrate, a first metal bonding layer provided on the peripheral circuit, a second metal bonding layer directly bonded to the first metal bonding layer, a memory cell array provided on the second metal bonding layer; and a second substrate provided on the memory cell array. A page buffer circuit in the peripheral circuit receives a verification result through the metal bonding layers, divides the verification result into stages, and sequentially outputs the verification result for the division into the stages, and a pass/failure checker in the peripheral circuit sequentially performs a counting operation about each of the stages to generate accumulated values, and compares the accumulated values and a reference value which increases from an initial value as the counting operation is performed, and the initial value is set by an external memory controller.
