18234529. SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
Contents
- 1 SEMICONDUCTOR PACKAGE
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
GWANGJAE Jeon of Suwon-si (KR)
Hyungchul Shin of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18234529 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the abstract consists of a lower structure with a first semiconductor substrate, first through vias, first signal pads, first dummy pads, and a first dielectric layer. The upper structure includes a second semiconductor substrate, second signal pads, second dummy pads, and a second dielectric layer. The first signal pad is in contact with one of the second signal pads, and the first dummy pad is in contact with one of the second dummy pads. The spacing between the first dummy pads is 0.5 to 1.5 times the spacing between the first signal pads.
- Lower structure:
- First semiconductor substrate - First through vias - First signal pads - First dummy pads - First dielectric layer
- Upper structure:
- Second semiconductor substrate - Second signal pads - Second dummy pads - Second dielectric layer
- Contact between first and second signal pads
- Contact between first and second dummy pads
- Specific spacing between dummy pads and signal pads
Potential Applications
The technology described in this patent application could be applied in the semiconductor packaging industry for improved performance and reliability of electronic devices.
Problems Solved
This technology solves the problem of signal interference and crosstalk in semiconductor packages by optimizing the spacing between signal pads and dummy pads.
Benefits
The benefits of this technology include enhanced signal integrity, reduced noise, and improved overall performance of semiconductor devices.
Potential Commercial Applications
- "Optimizing Signal Pad Spacing in Semiconductor Packages for Improved Performance"
Possible Prior Art
There may be prior art related to optimizing signal pad spacing in semiconductor packages to reduce signal interference and improve performance.
Unanswered Questions
How does this technology compare to existing solutions in the market?
This article does not provide a direct comparison with existing solutions in the market.
What are the specific manufacturing processes involved in implementing this technology?
The article does not delve into the specific manufacturing processes involved in implementing this technology.
Original Abstract Submitted
Disclosed is a semiconductor package comprising lower and upper structure. The lower structure includes a first semiconductor substrate, first through vias vertically penetrating the first semiconductor substrate, first signal pads connected to the first through vias, first dummy pads between the first signal pads and electrically separated from the first through vias, and a first dielectric layer surrounding the first signal pads and the first dummy pads. The upper structure includes a second semiconductor substrate, second signal pads and second dummy pads, and a second dielectric layer surrounding the second signal pads and the second dummy pads. The first signal pad is in contact with one of the second signal pads. The first dummy pad is in contact with one of the second dummy pads. A first interval between the first dummy pads is 0.5 to 1.5 times a second interval between the first signal pads.
