18232442. PROCESSOR AND METHOD OF DETECTING SOFT ERROR FROM PROCESSOR simplified abstract (Samsung Electronics Co., Ltd.)
Contents
- 1 PROCESSOR AND METHOD OF DETECTING SOFT ERROR FROM PROCESSOR
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 PROCESSOR AND METHOD OF DETECTING SOFT ERROR FROM PROCESSOR - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
PROCESSOR AND METHOD OF DETECTING SOFT ERROR FROM PROCESSOR
Organization Name
Inventor(s)
PROCESSOR AND METHOD OF DETECTING SOFT ERROR FROM PROCESSOR - A simplified explanation of the abstract
This abstract first appeared for US patent application 18232442 titled 'PROCESSOR AND METHOD OF DETECTING SOFT ERROR FROM PROCESSOR
Simplified Explanation
The processor described in the patent application includes an instruction pipeline that processes an original instruction and a duplicate instruction in sequence. The original instruction's result is stored in the original register file, while the duplicate instruction's result is stored in the duplicate register file. A comparing unit then checks for any discrepancies between the results stored in the two register files and outputs an error detection signal if needed.
- Instruction pipeline processing original and duplicate instructions sequentially
- Original register file storing result of original instruction
- Duplicate register file storing result of duplicate instruction
- Comparing unit checking for discrepancies between results in the two register files
- Error detection signal output in response to control signal
Potential Applications
This technology could be applied in:
- High-performance computing systems
- Real-time processing applications
- Fault-tolerant systems
Problems Solved
This technology helps in:
- Detecting errors in instruction processing
- Ensuring accuracy in results
- Enhancing system reliability
Benefits
The benefits of this technology include:
- Improved error detection capabilities
- Enhanced system performance
- Increased reliability in processing instructions
Potential Commercial Applications
Potential commercial applications of this technology could be in:
- Data centers
- Supercomputing facilities
- Aerospace and defense industries
Possible Prior Art
One possible prior art for this technology could be:
- Error detection mechanisms in multi-core processors
Unanswered Questions
How does this technology impact power consumption in the processor?
This article does not address the potential impact of this technology on power consumption in the processor.
What are the scalability limitations of this technology in terms of the number of instructions processed simultaneously?
This article does not discuss the scalability limitations of this technology in terms of the number of instructions processed simultaneously.
Original Abstract Submitted
A processor includes an instruction pipeline that sequentially processes an original instruction and a duplicate instruction, which is generated by duplicating the original instruction. An original register file stores a result obtained by processing the original instruction in the instruction pipeline within a register of a nindex thereof. A duplicate register file stores a result obtained by processing the duplicate instruction in the instruction pipeline within a register of a nindex thereof. A comparing unit compares the register of the nindex in the original register file with the register of nindex in the duplicate register file and outputs an error detection signal, in response to a control signal.
