18231838. SEMICONDUCTOR DEVICE HAVING A BONDED STRUCTURE AND AN ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR DEVICE HAVING A BONDED STRUCTURE AND AN ELECTRONIC SYSTEM INCLUDING THE SAME

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Changbum Kim of Suwon-si (KR)

Cheonan Lee of Suwon-si (KR)

Sukkang Sung of Suwon-si (KR)

SEMICONDUCTOR DEVICE HAVING A BONDED STRUCTURE AND AN ELECTRONIC SYSTEM INCLUDING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18231838 titled 'SEMICONDUCTOR DEVICE HAVING A BONDED STRUCTURE AND AN ELECTRONIC SYSTEM INCLUDING THE SAME

Simplified Explanation

The semiconductor device described in the patent application includes a first structure with a peripheral circuit on a first substrate, and a second structure with a cell stack on a common source plate.

  • The cell stack in the second structure consists of multiple cell blocks, including main blocks and at least one dummy block.
  • The common source plate has a main common source line region and a dummy common source line region.
  • The main common source line region overlaps the main blocks, while the dummy common source line region is electrically isolated from the dummy block.
    • Potential Applications:**

- This technology can be used in the manufacturing of advanced semiconductor devices for various electronic applications.

    • Problems Solved:**

- Provides improved performance and efficiency in semiconductor devices. - Helps in reducing interference and crosstalk between different components in the device.

    • Benefits:**

- Enhanced functionality and reliability of semiconductor devices. - Allows for more efficient use of space and resources in the device design.


Original Abstract Submitted

A semiconductor device includes: a first structure including a first substrate and a peripheral circuit disposed on the first substrate; and a second structure including a common source plate and a cell stack disposed on the common source plate and including a plurality of gate electrodes and channel structures, wherein the cell stack includes a plurality of cell blocks including a plurality of main blocks and at least one dummy block disposed at one side of the plurality of main blocks, wherein the common source plate includes a main common source line region and a dummy common source line region, wherein the main common source line region overlaps the plurality of main blocks, and the dummy common source line region is separated from the main common source line region and overlaps the at least one dummy block by being electrically isolated from the at least one dummy block.